Signed-off-by: Grzegorz Bernacki <g...@semihalf.com>
---
drivers/spi/Makefile | 1 +
drivers/spi/mpc52xx_spi.c | 108 +++++++++++++++++++++++++++++++++++++++++++++
include/mpc5xxx.h | 18 +++++++
3 files changed, 127 insertions(+), 0 deletions(-)
create mode 100644 drivers/spi/mpc52xx_spi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 1350f3e..1272c17 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -28,6 +28,7 @@ LIB := $(obj)libspi.a
COBJS-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o
COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o
+COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
diff --git a/drivers/spi/mpc52xx_spi.c b/drivers/spi/mpc52xx_spi.c
new file mode 100644
index 0000000..6dae7ad
--- /dev/null
+++ b/drivers/spi/mpc52xx_spi.c
@@ -0,0 +1,108 @@
+/*
+ * (C) Copyright 2009
+ * Frank Bodammer <frank.bodam...@gcd-solutions.de>
+ * (C) Copyright 2009 Semihalf, Grzegorz Bernacki
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <spi.h>
+#include <mpc5xxx.h>
+
+void spi_init(void)
+{
+ struct mpc5xxx_spi *spi = (struct mpc5xxx_spi *)MPC5XXX_SPI;
+ /*
+ * Its important to use the correct order when initializing the
+ * registers
+ */
+ spi->ddr = 0x0F; /* set all SPI pins as output */
+ spi->pdr = 0x00; /* set SS low */
+ /* SPI is master, SS is general purpose output */
+ spi->cr1 = SPI_CR_MSTR | SPI_CR_SPE;
+ spi->cr2 = 0x00; /* normal operation */
+ spi->brr = 0x77; /* baud rate: IPB clock / 2048 */
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+ struct spi_slave *slave;
+
+ slave = malloc(sizeof(struct spi_slave));
+ if (!slave)
+ return NULL;
+
+ slave->bus = bus;
+ slave->cs = cs;
+
+ return slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+ free(slave);
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+ return 0;
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+ return;
+}
+
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
+ void *din, unsigned long flags)
+{
+ struct mpc5xxx_spi *spi = (struct mpc5xxx_spi *)MPC5XXX_SPI;
+ int i, iter = bitlen >> 3;
+ const uchar *txp = dout;
+ uchar *rxp = din;
+
+ debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
+ slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
+
+ if (flags & SPI_XFER_BEGIN)
+ spi->pdr |= SPI_PDR_SS;
+
+ for (i = 0; i < iter; i++) {
+ udelay(1000);
+ debug("spi_xfer: sending %x\n", txp[i]);
+ spi->dr = txp[i];
+ while (!(spi->sr & SPI_SR_SPIF)) {
+ udelay(1000);
+ if (spi->sr & SPI_SR_WCOL) {
+ rxp[i] = spi->dr;
+ puts("spi_xfer: write collision\n");
+ return -1;
+ }
+ }
+ rxp[i] = spi->dr;
+ debug("spi_xfer: received %x\n", rxp[i]);
+ }
+ if (flags & SPI_XFER_END)
+ spi->pdr &= ~SPI_PDR_SS;
+
+ return 0;
+}
diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h
index 463d5ae..476d149 100644
--- a/include/mpc5xxx.h
+++ b/include/mpc5xxx.h
@@ -392,6 +392,24 @@
#define I2C_IF 0x02
#define I2C_RXAK 0x01
+/* SPI control register 1 bits */
+#define SPI_CR_LSBFE 0x01
+#define SPI_CR_SSOE 0x02
+#define SPI_CR_CPHA 0x04
+#define SPI_CR_CPOL 0x08
+#define SPI_CR_MSTR 0x10
+#define SPI_CR_SWOM 0x20
+#define SPI_CR_SPE 0x40
+#define SPI_CR_SPIE 0x80
+
+/* SPI status register bits */
+#define SPI_SR_MODF 0x10
+#define SPI_SR_WCOL 0x40
+#define SPI_SR_SPIF 0x80
+
+/* SPI port data register bits */
+#define SPI_PDR_SS 0x08
+
/* Programmable Serial Controller (PSC) status register bits */
#define PSC_SR_CDE 0x0080
#define PSC_SR_RXRDY 0x0100
--
1.6.0.6
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