On 08/29/2014 02:25 PM, Max Filippov wrote: > Hi Michal, > > On Fri, Aug 29, 2014 at 3:50 PM, Michal Simek <mon...@monstr.eu> wrote: >> On 08/20/2014 07:42 PM, Max Filippov wrote: >>> this series adds U-Boot port to Xtensa, configurable processor architecture >>> from Tensilica, Inc., now Cadence Design Systems Inc. >>> >>> Preparation patches clean up OpenCores 10/100 MBit driver, enable it to be >>> used with dedicated packet memory and with gigabit PHY. Two patches add >>> proper xtensa bits: changes to shares files and contents of arch/xtensa. >>> One more patch adds sample xtensa CPU configuration -- Diamond 232. >>> One more patch adds xtfpga board family that consists of Avnet LX60, LX110 >>> and LX200 and Xilinx ML605 and KC705 FPGA boards configured with xtensa >>> bitstream. >> >> Any link to bitstreams? I have ml605 and kc705 here and will be nice to test >> it. > > The board alone is not enough to boot xtensa software, as the JTAG connector > capable of loading code into CPU goes on a separate daughterboard that plugs > into FMC connectors. I will check if I can share a bitstream and if it may be > somehow used with the FPGA board alone.
Any link to that FMC connector and connections there? > However you should be able to test with qemu, as it simulates all necessary > hardware. Some examples are listed here: > http://wiki.linux-xtensa.org/index.php/Xtensa_on_QEMU I am more interested to see this work on real HW than on qemu. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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