Hi Max, On 08/20/2014 07:42 PM, Max Filippov wrote: > Hi Tom, > > this series adds U-Boot port to Xtensa, configurable processor architecture > from Tensilica, Inc., now Cadence Design Systems Inc. > > Preparation patches clean up OpenCores 10/100 MBit driver, enable it to be > used with dedicated packet memory and with gigabit PHY. Two patches add > proper xtensa bits: changes to shares files and contents of arch/xtensa. > One more patch adds sample xtensa CPU configuration -- Diamond 232. > One more patch adds xtfpga board family that consists of Avnet LX60, LX110 > and LX200 and Xilinx ML605 and KC705 FPGA boards configured with xtensa > bitstream.
Any link to bitstreams? I have ml605 and kc705 here and will be nice to test it. Thanks, Michal
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