Hi Fabio, On 15/08/2014 06:00, Fabio Estevam wrote: > From: Fabio Estevam <fabio.este...@freescale.com> > > Use the latest DDR initialization values suggested by the FSL hardware team. > > While at it, add some comments for clarification. > > Signed-off-by: Fabio Estevam <fabio.este...@freescale.com> > --- > board/freescale/mx6sxsabresd/imximage.cfg | 89 > ++++++++++++++++++++----------- > 1 file changed, 58 insertions(+), 31 deletions(-) > > diff --git a/board/freescale/mx6sxsabresd/imximage.cfg > b/board/freescale/mx6sxsabresd/imximage.cfg > index 406dece..c862617 100644 > --- a/board/freescale/mx6sxsabresd/imximage.cfg > +++ b/board/freescale/mx6sxsabresd/imximage.cfg > @@ -30,6 +30,7 @@ BOOT_FROM sd > * value value to be stored in the register > */ > > +/* Enable all clocks */ > DATA 4 0x020c4068 0xffffffff > DATA 4 0x020c406c 0xffffffff > DATA 4 0x020c4070 0xffffffff > @@ -39,46 +40,69 @@ DATA 4 0x020c407c 0xffffffff > DATA 4 0x020c4080 0xffffffff > DATA 4 0x020c4084 0xffffffff > > +/* IOMUX - DDR IO Type */ > DATA 4 0x020e0618 0x000c0000 > DATA 4 0x020e05fc 0x00000000 > + > +/* Clock */ > DATA 4 0x020e032c 0x00000030 > > -DATA 4 0x020e0300 0x00000030 > -DATA 4 0x020e02fc 0x00000030 > -DATA 4 0x020e05f4 0x00000030 > -DATA 4 0x020e0340 0x00000030 > +/* Address */ > +DATA 4 0x020e0300 0x00000020 > +DATA 4 0x020e02fc 0x00000020 > +DATA 4 0x020e05f4 0x00000020 > + > +/* Control */ > +DATA 4 0x020e0340 0x00000020 > > DATA 4 0x020e0320 0x00000000 > -DATA 4 0x020e0310 0x00000030 > -DATA 4 0x020e0314 0x00000030 > -DATA 4 0x020e0614 0x00000030 > +DATA 4 0x020e0310 0x00000020 > +DATA 4 0x020e0314 0x00000020 > +DATA 4 0x020e0614 0x00000020 > > +/* Data Strobe */ > DATA 4 0x020e05f8 0x00020000 > -DATA 4 0x020e0330 0x00000030 > -DATA 4 0x020e0334 0x00000030 > -DATA 4 0x020e0338 0x00000030 > -DATA 4 0x020e033c 0x00000030 > +DATA 4 0x020e0330 0x00000028 > +DATA 4 0x020e0334 0x00000028 > +DATA 4 0x020e0338 0x00000028 > +DATA 4 0x020e033c 0x00000028 > + > +/* Data */ > DATA 4 0x020e0608 0x00020000 > -DATA 4 0x020e060c 0x00000030 > -DATA 4 0x020e0610 0x00000030 > -DATA 4 0x020e061c 0x00000030 > -DATA 4 0x020e0620 0x00000030 > -DATA 4 0x020e02ec 0x00000030 > -DATA 4 0x020e02f0 0x00000030 > -DATA 4 0x020e02f4 0x00000030 > -DATA 4 0x020e02f8 0x00000030 > +DATA 4 0x020e060c 0x00000028 > +DATA 4 0x020e0610 0x00000028 > +DATA 4 0x020e061c 0x00000028 > +DATA 4 0x020e0620 0x00000028 > +DATA 4 0x020e02ec 0x00000028 > +DATA 4 0x020e02f0 0x00000028 > +DATA 4 0x020e02f4 0x00000028 > +DATA 4 0x020e02f8 0x00000028 > + > +/* Calibrations - ZQ */ > DATA 4 0x021b0800 0xa1390003 > -DATA 4 0x021b080c 0x00270025 > -DATA 4 0x021b0810 0x001B001E > -DATA 4 0x021b083c 0x4144013C > -DATA 4 0x021b0840 0x01300128 > -DATA 4 0x021b0848 0x4044464A > -DATA 4 0x021b0850 0x3A383C34 > + > +/* Write leveling */ > +DATA 4 0x021b080c 0x00290025 > +DATA 4 0x021b0810 0x00220022 > + > +/* DQS Read Gate */ > +DATA 4 0x021b083c 0x41480144 > +DATA 4 0x021b0840 0x01340130 > + > +/* Read/Write Delay */ > +DATA 4 0x021b0848 0x3C3E4244 > +DATA 4 0x021b0850 0x34363638 > + > +/* Read data bit delay */ > DATA 4 0x021b081c 0x33333333 > DATA 4 0x021b0820 0x33333333 > DATA 4 0x021b0824 0x33333333 > DATA 4 0x021b0828 0x33333333 > + > +/* Complete calibration by forced measurement */ > DATA 4 0x021b08b8 0x00000800 > + > +/* MMDC init - DDR3, 64-bit mode, only MMDC0 is initiated */ > DATA 4 0x021b0004 0x0002002d > DATA 4 0x021b0008 0x00333030 > DATA 4 0x021b000c 0x676b52f3 > @@ -90,16 +114,19 @@ DATA 4 0x021b002c 0x000026d2 > DATA 4 0x021b0030 0x006b1023 > DATA 4 0x021b0040 0x0000005f > DATA 4 0x021b0000 0x84190000 > + > +/* Initialize MT41K256M16HA-125 - MR2 */ > DATA 4 0x021b001c 0x04008032 > +/* MR3 */ > DATA 4 0x021b001c 0x00008033 > -DATA 4 0x021b001c 0x00068031 > +/* MR1 */ > +DATA 4 0x021b001c 0x00048031 > +/* MR0 */ > DATA 4 0x021b001c 0x05208030 > +/* DDR device ZQ calibration */ > DATA 4 0x021b001c 0x04008040 > + > +/* Final DDR setup, before operation start */ > DATA 4 0x021b0020 0x00000800 > DATA 4 0x021b0818 0x00011117 > DATA 4 0x021b001c 0x00000000 > - > -DATA 4 0x021b083c 0x41400138 > -DATA 4 0x021b0840 0x012C011C > -DATA 4 0x021b0848 0x3C3C4044 > -DATA 4 0x021b0850 0x34343638 >
Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de ===================================================================== _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
