From: Written-by: Prafulla Wadaskar <prafu...@marvell.com>

References: http://plugcomputer.org/
Serial console Setup
http://openplug.org/plugwiki/index.php/Serial_terminal_program#Linux
OpenOCD Setup
http://openplug.org/plugwiki/index.php/Setting_Up_OpenOCD_Under_Linux

This patch is tested for-
1. Boot from DRAM/NAND flash
2. File transfer using tftp
3. NAND flash read/write/erase
4. System bring up (Kernel and RFS) from NDND Flash

Signed-off-by: Prafulla Wadaskar <prafu...@marvell.com>
---
Change log:
v1: updated as per review comment
copyright statement corrected.
mtdparts definition updated.
code moved to valid location in Makefile and MAKEALL
all code lines checked for max size 80 chars

 MAKEALL                               |    1 +
 Makefile                              |    4 +-
 board/Marvell/sheevaplug/Makefile     |   52 +++++++++
 board/Marvell/sheevaplug/config.mk    |   25 +++++
 board/Marvell/sheevaplug/nand.c       |   80 ++++++++++++++
 board/Marvell/sheevaplug/sheevaplug.c |  135 ++++++++++++++++++++++++
 board/Marvell/sheevaplug/sheevaplug.h |   37 +++++++
 include/configs/sheevaplug.h          |  186 +++++++++++++++++++++++++++++++++
 8 files changed, 519 insertions(+), 1 deletions(-)
 create mode 100644 board/Marvell/sheevaplug/Makefile
 create mode 100644 board/Marvell/sheevaplug/config.mk
 create mode 100644 board/Marvell/sheevaplug/nand.c
 create mode 100644 board/Marvell/sheevaplug/sheevaplug.c
 create mode 100644 board/Marvell/sheevaplug/sheevaplug.h
 create mode 100644 include/configs/sheevaplug.h

diff --git a/MAKEALL b/MAKEALL
index 6719d7b..e9b3fa7 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -517,6 +517,7 @@ LIST_ARM9="                 \
        omap730p2               \
        sbc2410x                \
        scb9328                 \
+       sheevaplug              \
        smdk2400                \
        smdk2410                \
        trab                    \
diff --git a/Makefile b/Makefile
index 8144ecd..daebc59 100644
--- a/Makefile
+++ b/Makefile
@@ -2882,6 +2882,9 @@ sbc2410x_config: unconfig
 scb9328_config :       unconfig
        @$(MKCONFIG) $(@:_config=) arm arm920t scb9328 NULL imx
 
+sheevaplug_config: unconfig
+       @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
+
 smdk2400_config        :       unconfig
        @$(MKCONFIG) $(@:_config=) arm arm920t smdk2400 samsung s3c24x0
 
@@ -3110,7 +3113,6 @@ omap2420h4_config : unconfig
 qong_config            : unconfig
        @$(MKCONFIG) $(@:_config=) arm arm1136 qong davedenx mx31
 
-
 #########################################################################
 ## ARM1176 Systems
 #########################################################################
diff --git a/board/Marvell/sheevaplug/Makefile 
b/board/Marvell/sheevaplug/Makefile
new file mode 100644
index 0000000..8b8e9ad
--- /dev/null
+++ b/board/Marvell/sheevaplug/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Prafulla Wadaskar <prafu...@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB    = $(obj)lib$(BOARD).a
+
+COBJS  := sheevaplug.o
+COBJS  += nand.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):        $(obj).depend $(OBJS) $(SOBJS)
+       $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+       rm -f $(SOBJS) $(OBJS)
+
+distclean:     clean
+       rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/Marvell/sheevaplug/config.mk 
b/board/Marvell/sheevaplug/config.mk
new file mode 100644
index 0000000..a4ea769
--- /dev/null
+++ b/board/Marvell/sheevaplug/config.mk
@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Prafulla Wadaskar <prafu...@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+TEXT_BASE = 0x00600000
diff --git a/board/Marvell/sheevaplug/nand.c b/board/Marvell/sheevaplug/nand.c
new file mode 100644
index 0000000..9a7c2ce
--- /dev/null
+++ b/board/Marvell/sheevaplug/nand.c
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) Marvell International Ltd. and its affiliates
+ * Written-by: Prafulla Wadaskar <prafu...@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/kirkwood.h>
+#ifdef CONFIG_CMD_NAND
+#include <nand.h>
+
+static struct kwnandf_registers *nf_reg =
+               (struct kwnandf_registers *)KW_NANDF_BASE;
+
+/*
+ *     hardware specific access to control-lines/bits
+ */
+#define        MASK_CLE                        0x01
+#define        MASK_ALE                        0x02
+#define NAND_ACTCEBOOT_BIT             0x02
+
+static void kw_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+       struct nand_chip *this = mtd->priv;
+       ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
+
+       if (ctrl & NAND_CTRL_CHANGE) {
+               if (ctrl & NAND_CLE)
+                       IO_ADDR_W |= MASK_CLE;
+               else
+                       IO_ADDR_W &= ~MASK_CLE;
+
+               if (ctrl & NAND_ALE)
+                       IO_ADDR_W |= MASK_ALE;
+               else
+                       IO_ADDR_W &= ~MASK_ALE;
+
+               this->IO_ADDR_W = (void __iomem *)IO_ADDR_W;
+       }
+       if (cmd != NAND_CMD_NONE)
+               writeb(cmd, this->IO_ADDR_W);
+}
+
+void kw_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+       u32 data;
+
+       data = readl(&nf_reg->ctrl);
+       data |= NAND_ACTCEBOOT_BIT;
+       writel(data, &nf_reg->ctrl);
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+       nand->options = NAND_SAMSUNG_LP_OPTIONS;
+       nand->ecc.mode = NAND_ECC_SOFT;
+       nand->cmd_ctrl = kw_nand_hwcontrol;
+       nand->chip_delay = 30;
+       nand->select_chip = kw_nand_select_chip;
+       return 0;
+}
+#endif /* CONFIG_CMD_NAND */
diff --git a/board/Marvell/sheevaplug/sheevaplug.c 
b/board/Marvell/sheevaplug/sheevaplug.c
new file mode 100644
index 0000000..6d49e1d
--- /dev/null
+++ b/board/Marvell/sheevaplug/sheevaplug.c
@@ -0,0 +1,135 @@
+/*
+ * Maintainer : Written-by: Prafulla Wadaskar <prafu...@marvell.com>
+ *
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafu...@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <netdev.h>
+#include <asm/arch/kirkwood.h>
+#include <asm/arch/mpp.h>
+#include "sheevaplug.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+       /*
+        * default gpio configuration
+        * There are maximum 64 gpios controlled through 2 sets of registers
+        * the  below configuration configures mainly initial LED status
+        */
+       kw_config_gpio(SHEEVAPLUG_OE_VAL_LOW,
+                       SHEEVAPLUG_OE_VAL_HIGH,
+                       SHEEVAPLUG_OE_LOW, SHEEVAPLUG_OE_HIGH);
+
+       /* Multi-Purpose Pins Functionality configuration */
+       u32 kwmpp_config[] = {
+               MPP0_NF_IO2,
+               MPP1_NF_IO3,
+               MPP2_NF_IO4,
+               MPP3_NF_IO5,
+               MPP4_NF_IO6,
+               MPP5_NF_IO7,
+               MPP6_SYSRST_OUTn,
+               MPP7_GPO,
+               MPP8_UART0_RTS,
+               MPP9_UART0_CTS,
+               MPP10_UART0_TXD,
+               MPP11_UART0_RXD,
+               MPP12_SD_CLK,
+               MPP13_SD_CMD,
+               MPP14_SD_D0,
+               MPP15_SD_D1,
+               MPP16_SD_D2,
+               MPP17_SD_D3,
+               MPP18_NF_IO0,
+               MPP19_NF_IO1,
+               MPP20_GPIO,
+               MPP21_GPIO,
+               MPP22_GPIO,
+               MPP23_GPIO,
+               MPP24_GPIO,
+               MPP25_GPIO,
+               MPP26_GPIO,
+               MPP27_GPIO,
+               MPP28_GPIO,
+               MPP29_TSMP9,
+               MPP30_GPIO,
+               MPP31_GPIO,
+               MPP32_GPIO,
+               MPP33_GPIO,
+               MPP34_GPIO,
+               MPP35_GPIO,
+               MPP36_GPIO,
+               MPP37_GPIO,
+               MPP38_GPIO,
+               MPP39_GPIO,
+               MPP40_GPIO,
+               MPP41_GPIO,
+               MPP42_GPIO,
+               MPP43_GPIO,
+               MPP44_GPIO,
+               MPP45_GPIO,
+               MPP46_GPIO,
+               MPP47_GPIO,
+               MPP48_GPIO,
+               MPP49_GPIO,
+               0
+       };
+       kirkwood_mpp_conf(kwmpp_config);
+
+       /*
+        * arch number of board
+        */
+       gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;
+
+       /* adress of boot parameters */
+       gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+
+       return 0;
+}
+
+int dram_init(void)
+{
+       int i;
+
+       for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+               gd->bd->bi_dram[i].start = kw_sdram_bar(i);
+               gd->bd->bi_dram[i].size = kw_sdram_bs(i);
+       }
+       return 0;
+}
+
+#ifdef CONFIG_MV88E1116_PHY
+void reset_phy(void)
+{
+       /* configure and initialize phy */
+       struct mv88e1116_config phycfg = {
+               .name = "egiga0",
+               .rgmii_delay = MV88E1116_RGMII_DELAY_EN,
+               .led_init = MV88E1116_LED_INIT_EN,
+       };
+       mv88e1116_phy_initialize(&phycfg);
+}
+#endif /* CONFIG_MV88E1116_PHY */
diff --git a/board/Marvell/sheevaplug/sheevaplug.h 
b/board/Marvell/sheevaplug/sheevaplug.h
new file mode 100644
index 0000000..eb6de80
--- /dev/null
+++ b/board/Marvell/sheevaplug/sheevaplug.h
@@ -0,0 +1,37 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafu...@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __SHEEVAPLUG_H
+#define __SHEEVAPLUG_H
+
+#ifndef MACH_TYPE_SHEEVAPLUG
+#define MACH_TYPE_SHEEVAPLUG   2097
+#endif
+
+#define SHEEVAPLUG_OE_LOW              (~(0))
+#define SHEEVAPLUG_OE_HIGH             (~(0))
+#define SHEEVAPLUG_OE_VAL_LOW          (1 << 29)       /* USB_PWEN low */
+#define SHEEVAPLUG_OE_VAL_HIGH         (1 << 17)       /* LED pin high */
+
+#endif /* __SHEEVAPLUG_H */
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
new file mode 100644
index 0000000..1844ec8
--- /dev/null
+++ b/include/configs/sheevaplug.h
@@ -0,0 +1,186 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafu...@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _CONFIG_SHEEVAPLUG_H
+#define _CONFIG_SHEEVAPLUG_H
+
+/*
+ * Version number information
+ */
+#define CONFIG_IDENT_STRING    "\nMarvell-Sheevaplug"
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_MARVELL         1
+#define CONFIG_ARM926EJS       1       /* Basic Architecture */
+#define CONFIG_FEROCEON_88FR131        1       /* CPU Core subversion */
+#define CONFIG_KIRKWOOD                1       /* SOC Family Name */
+#define CONFIG_KW88F6281       1       /* SOC Name */
+#define CONFIG_MACH_SHEEVAPLUG /* Machine type */
+
+#define CONFIG_MD5     /* get_random_hex on krikwood needs MD5 support */
+#define CONFIG_SKIP_LOWLEVEL_INIT      /* disable board lowlevel_init */
+#define CONFIG_KIRKWOOD_EGIGA_INIT     /* Enable GbePort0/1 for kernel */
+#define CONFIG_KIRKWOOD_PCIE_INIT      /* Enable PCIE Port0 for kernel */
+#define CONFIG_KIRKWOOD_RGMII_PAD_1V8  /* Set RGMII Pad voltage to 1.8V */
+
+/*
+ * CLKs configurations
+ */
+#define CONFIG_SYS_HZ          1000
+
+/*
+ * NS16550 Configuration
+ */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE    (-4)
+#define CONFIG_SYS_NS16550_CLK         CONFIG_SYS_TCLK
+#define CONFIG_SYS_NS16550_COM1                KW_UART0_BASE
+
+/*
+ * Serial Port configuration
+ * The following definitions let you select what serial you want to use
+ * for your console driver.
+ */
+
+#define CONFIG_CONS_INDEX      1       /*Console on UART0 */
+#define CONFIG_BAUDRATE                        115200  /* console baudrate */
+#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, \
+                                         115200,230400, 460800, 921600 }
+/* auto boot */
+#define CONFIG_BOOTDELAY       3       /* default enable autoboot */
+
+#define CONFIG_CMDLINE_TAG     1       /* enable passing of ATAGs  */
+#define CONFIG_INITRD_TAG      1       /* enable INITRD tag */
+#define CONFIG_SETUP_MEMORY_TAGS 1     /* enable memory tag */
+
+#define        CONFIG_SYS_PROMPT       "Marvell>> "    /* Command Prompt */
+#define        CONFIG_SYS_CBSIZE       1024    /* Console I/O Buff Size */
+#define        CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE \
+               +sizeof(CONFIG_SYS_PROMPT) + 16)        /* Print Buff */
+/*
+ * Commands configuration
+ */
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_AUTOSCRIPT
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_CMD_NAND
+
+/*
+ * Flash configuration
+ */
+#ifndef CONFIG_CMD_FLASH
+#define CONFIG_SYS_NO_FLASH            1       /* Declare no flash (NOR/SPI) */
+#endif
+
+/*
+ * NAND configuration
+ */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_SYS_MAX_NAND_DEVICE     1
+#define NAND_MAX_CHIPS                 1
+#define CONFIG_SYS_NAND_BASE           0xf9000000
+#define NAND_ALLOW_ERASE_ALL           1
+#endif
+
+/*
+ *  Environment variables configurations
+ */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_ENV_IS_IN_NAND          1
+#define CONFIG_ENV_SECT_SIZE           0x20000 /* 128K */
+#else
+#define CONFIG_ENV_IS_NOWHERE          1       /* if env in SDRAM */
+#endif
+#define CONFIG_ENV_SIZE                        0x20000 /* 128k */
+#define CONFIG_ENV_ADDR                        0x40000
+#define CONFIG_ENV_OFFSET              0x40000 /* env starts here */
+
+/*
+ * Default environment variables
+ */
+#define CONFIG_BOOTCOMMAND             "${x_bootcmd_kernel}; " \
+       "setenv bootargs ${x_bootargs} ${x_bootargs_root}; "    \
+       "bootm 0x6400000;"
+
+#define CONFIG_MTDPARTS                        "orion_nand:512k(uboot),"       
\
+       "1...@4m(psm),3...@1m(kernel),1...@5m(rootfs) rw\0"
+
+#define CONFIG_EXTRA_ENV_SETTINGS      "x_bootargs=console"    \
+       "=ttyS0,115200 mtdparts="CONFIG_MTDPARTS        \
+       "x_bootcmd_kernel=nand read 0x100000 0x6400000 0x300000\0" \
+       "x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0"
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN  (1024 * 128) /* 128kB for malloc() */
+/* size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE       128
+
+/*
+ * Other required minimal configurations
+ */
+#define CONFIG_CONSOLE_INFO_QUIET      /* some code reduction */
+#define CONFIG_ARCH_CPU_INIT   /* call arch_cpu_init() */
+#define CONFIG_ARCH_MISC_INIT  /* call arch_misc_init() */
+#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
+#define CONFIG_NR_DRAM_BANKS   4
+#define CONFIG_STACKSIZE       0x00100000      /* regular stack- 1M */
+#define CONFIG_SYS_LOAD_ADDR   0x00800000      /* default load adr- 8M */
+#define CONFIG_SYS_MEMTEST_START 0x00400000    /* 4M */
+#define CONFIG_SYS_MEMTEST_END 0x007fffff      /*(_8M -1) */
+#define CONFIG_SYS_RESET_ADDRESS 0xffff0000    /* Rst Vector Adr */
+#define CONFIG_SYS_MAXARGS     16      /* max number of command args */
+
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_NETCONSOLE      /* include NetConsole support   */
+#define CONFIG_NET_MULTI       /* specify more that one ports available */
+#define        CONFIG_MII              /* expose smi ove miiphy interface */
+#define CONFIG_KIRKWOOD_EGIGA  /* Enable kirkwood Gbe Controller Driver */
+#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN        /* detect link using phy */
+#define CONFIG_KIRKWOOD_EGIGA_PORTS    {1,0}   /* enable port 0 only */
+#define CONFIG_PHY_BASE_ADR    0
+#define CONFIG_ENV_OVERWRITE   /* ethaddr can be reprogrammed */
+#endif /* CONFIG_CMD_NET */
+
+/*
+ * Marvell 88Exxxx Switch configurations
+ */
+#define CONFIG_RESET_PHY_R     /* use reset_phy() to init phy/swtich */
+#define CONFIG_MV88E1116_PHY   /* Enable mv88e61xx switch driver */
+
+#endif /* _CONFIG_SHEEVAPLUG_H */
-- 
1.5.3.3

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Reply via email to