The definitions inside emif_defs.h concern davinci nand driver and
should be in it's header. So create header file for davinci nand
driver and move definitions from emif_defs.h to it.
Acked-by: Vitaly Andrianov <vita...@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronz...@ti.com>
---
arch/arm/cpu/armv7/keystone/aemif.c | 2 +-
arch/arm/include/asm/arch-keystone/emif_defs.h | 73 --------------------------
arch/arm/include/asm/arch-keystone/nand_defs.h | 23 --------
board/ti/k2hk_evm/board.c | 1 -
drivers/mtd/nand/davinci_nand.c | 3 +-
drivers/mtd/nand/davinci_nand.h | 66 +++++++++++++++++++++++
6 files changed, 68 insertions(+), 100 deletions(-)
delete mode 100644 arch/arm/include/asm/arch-keystone/emif_defs.h
delete mode 100644 arch/arm/include/asm/arch-keystone/nand_defs.h
create mode 100644 drivers/mtd/nand/davinci_nand.h
diff --git a/arch/arm/cpu/armv7/keystone/aemif.c
b/arch/arm/cpu/armv7/keystone/aemif.c
index 9b26886..9ba1549 100644
--- a/arch/arm/cpu/armv7/keystone/aemif.c
+++ b/arch/arm/cpu/armv7/keystone/aemif.c
@@ -10,7 +10,7 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/emif_defs.h>
+#include <../drivers/mtd/nand/davinci_nand.h>
#define AEMIF_CFG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0)
#define AEMIF_CFG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0)
diff --git a/arch/arm/include/asm/arch-keystone/emif_defs.h
b/arch/arm/include/asm/arch-keystone/emif_defs.h
deleted file mode 100644
index a3378aa..0000000
--- a/arch/arm/include/asm/arch-keystone/emif_defs.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * emif definitions to re-use davinci emif driver on Keystone2
- *
- * (C) Copyright 2012-2014
- * Texas Instruments Incorporated, <www.ti.com>
- * (C) Copyright 2007 Sergey Kubushyn <k...@koi8.net>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#ifndef _EMIF_DEFS_H_
-#define _EMIF_DEFS_H_
-
-#include <asm/arch/hardware.h>
-
-struct davinci_emif_regs {
- uint32_t ercsr;
- uint32_t awccr;
- uint32_t sdbcr;
- uint32_t sdrcr;
- uint32_t abncr[4];
- uint32_t sdtimr;
- uint32_t ddrsr;
- uint32_t ddrphycr;
- uint32_t ddrphysr;
- uint32_t totar;
- uint32_t totactr;
- uint32_t ddrphyid_rev;
- uint32_t sdsretr;
- uint32_t eirr;
- uint32_t eimr;
- uint32_t eimsr;
- uint32_t eimcr;
- uint32_t ioctrlr;
- uint32_t iostatr;
- uint32_t rsvd0;
- uint32_t one_nand_cr;
- uint32_t nandfcr;
- uint32_t nandfsr;
- uint32_t rsvd1[2];
- uint32_t nandfecc[4];
- uint32_t rsvd2[15];
- uint32_t nand4biteccload;
- uint32_t nand4bitecc[4];
- uint32_t nanderradd1;
- uint32_t nanderradd2;
- uint32_t nanderrval1;
- uint32_t nanderrval2;
-};
-
-#define davinci_emif_regs \
- ((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE)
-
-#define DAVINCI_NANDFCR_NAND_ENABLE(n) (1 << ((n) - 2))
-#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4)
-#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) (((n) - 2) << 4)
-#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + ((n) - 2)))
-#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12)
-#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
-
-/* Chip Select setup */
-#define DAVINCI_ABCR_STROBE_SELECT (1 << 31)
-#define DAVINCI_ABCR_EXT_WAIT (1 << 30)
-#define DAVINCI_ABCR_WSETUP(n) ((n) << 26)
-#define DAVINCI_ABCR_WSTROBE(n) ((n) << 20)
-#define DAVINCI_ABCR_WHOLD(n) ((n) << 17)
-#define DAVINCI_ABCR_RSETUP(n) ((n) << 13)
-#define DAVINCI_ABCR_RSTROBE(n) ((n) << 7)
-#define DAVINCI_ABCR_RHOLD(n) ((n) << 4)
-#define DAVINCI_ABCR_TA(n) ((n) << 2)
-#define DAVINCI_ABCR_ASIZE_16BIT 1
-#define DAVINCI_ABCR_ASIZE_8BIT 0
-
-#endif
diff --git a/arch/arm/include/asm/arch-keystone/nand_defs.h
b/arch/arm/include/asm/arch-keystone/nand_defs.h
deleted file mode 100644
index 58417db..0000000
--- a/arch/arm/include/asm/arch-keystone/nand_defs.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * nand driver definitions to re-use davinci nand driver on Keystone2
- *
- * (C) Copyright 2012-2014
- * Texas Instruments Incorporated, <www.ti.com>
- * (C) Copyright 2007 Sergey Kubushyn <k...@koi8.net>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#ifndef _NAND_DEFS_H_
-#define _NAND_DEFS_H_
-
-#include <asm/arch/hardware.h>
-#include <linux/mtd/nand.h>
-
-#define MASK_CLE 0x4000
-#define MASK_ALE 0x2000
-
-#define NAND_READ_START 0x00
-#define NAND_READ_END 0x30
-#define NAND_STATUS 0x70
-
-#endif
diff --git a/board/ti/k2hk_evm/board.c b/board/ti/k2hk_evm/board.c
index dc39139..53f26b2 100644
--- a/board/ti/k2hk_evm/board.c
+++ b/board/ti/k2hk_evm/board.c
@@ -16,7 +16,6 @@
#include <asm/arch/clock.h>
#include <asm/io.h>
#include <asm/mach-types.h>
-#include <asm/arch/nand_defs.h>
#include <asm/arch/emac_defs.h>
#include <asm/arch/psc_defs.h>
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 75b03a7..bacf1f1 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -32,8 +32,7 @@
#include <common.h>
#include <asm/io.h>
#include <nand.h>
-#include <asm/arch/nand_defs.h>
-#include <asm/arch/emif_defs.h>
+#include "davinci_nand.h"
/* Definitions for 4-bit hardware ECC */
#define NAND_TIMEOUT 10240
diff --git a/drivers/mtd/nand/davinci_nand.h b/drivers/mtd/nand/davinci_nand.h
new file mode 100644
index 0000000..db8d896
--- /dev/null
+++ b/drivers/mtd/nand/davinci_nand.h
@@ -0,0 +1,66 @@
+/*
+ * NAND Flash Driver
+ *
+ * Copyright (C) 2006-2014 Texas Instruments.
+ *
+ * Based on Linux DaVinci NAND driver by TI.
+ */
+
+#ifndef _DAVINCI_NAND_H_
+#define _DAVINCI_NAND_H_
+
+#include <linux/mtd/nand.h>
+
+#define MASK_CLE 0x4000
+#define MASK_ALE 0x2000
+
+#define NAND_READ_START 0x00
+#define NAND_READ_END 0x30
+#define NAND_STATUS 0x70
+
+struct davinci_emif_regs {
+ uint32_t ercsr;
+ uint32_t awccr;
+ uint32_t sdbcr;
+ uint32_t sdrcr;
+ uint32_t abncr[4];
+ uint32_t sdtimr;
+ uint32_t ddrsr;
+ uint32_t ddrphycr;
+ uint32_t ddrphysr;
+ uint32_t totar;
+ uint32_t totactr;
+ uint32_t ddrphyid_rev;
+ uint32_t sdsretr;
+ uint32_t eirr;
+ uint32_t eimr;
+ uint32_t eimsr;
+ uint32_t eimcr;
+ uint32_t ioctrlr;
+ uint32_t iostatr;
+ uint32_t rsvd0;
+ uint32_t one_nand_cr;
+ uint32_t nandfcr;
+ uint32_t nandfsr;
+ uint32_t rsvd1[2];
+ uint32_t nandfecc[4];
+ uint32_t rsvd2[15];
+ uint32_t nand4biteccload;
+ uint32_t nand4bitecc[4];
+ uint32_t nanderradd1;
+ uint32_t nanderradd2;
+ uint32_t nanderrval1;
+ uint32_t nanderrval2;
+};
+
+#define davinci_emif_regs \
+ ((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE)
+
+#define DAVINCI_NANDFCR_NAND_ENABLE(n) (1 << ((n) - 2))
+#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4)
+#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) (((n) - 2) << 4)
+#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + ((n) - 2)))
+#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12)
+#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
+
+#endif
--
1.8.3.2
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