On 02.04.2014 05:33, nitin.g...@freescale.com wrote:
From: Nitin Garg <nitin.g...@freescale.com>
Full cache line writes to the same memory region from at least two
processors might deadlock the processor. Exists on r1, r2, r3
revisions.
Signed-off-by: Nitin Garg <nitin.g...@freescale.com>
---
README | 1 +
arch/arm/cpu/armv7/start.S | 5 +++++
2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/README b/README
index a496c65..b7c0f68 100644
--- a/README
+++ b/README
@@ -567,6 +567,7 @@ The following options need to be configured:
CONFIG_ARM_ERRATA_743622
CONFIG_ARM_ERRATA_751472
CONFIG_ARM_ERRATA_794072
+ CONFIG_ARM_ERRATA_761320
If set, the workarounds for these ARM errata are applied early
during U-Boot startup. Note that these options force the
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index b87a378..1229476 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -227,6 +227,11 @@ ENTRY(cpu_init_cp15)
orr r0, r0, #1 << 4 @ set bit #4
mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
#endif
+#ifdef CONFIG_ARM_ERRATA_761320
+ mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
+ orr r0, r0, #1 << 21 @ set bit #21
+ mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
+#endif
Is there any reason why you dropped the check for r4p0
cmp r6, #0x40 @ present prior to r4p0
which you still had in
http://www.spinics.net/lists/arm-kernel/msg319223.html
?
Best regards
Dirk
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