On 02/20/2014 09:16 PM, Shengzhou Liu wrote: > T2081 QDS is a high-performance computing evaluation, development and > test platform supporting the T2081 QorIQ Power Architecture processor. > > T2081QDS board Overview > ----------------------- > - T2081 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz > - 2MB shared L2 and 512KB L3 CoreNet platform cache (CPC) > - CoreNet fabric supporting coherent and noncoherent transactions with > prioritization and bandwidth allocation > - 32-/64-bit DDR3/DDR3LP SDRAM memory controller with ECC and interleaving > - Ethernet interfaces: > - Two on-board 10M/100M/1G bps RGMII ports > - Two 10Gbps XFI with on-board SFP+ cage > - 1Gbps/2.5Gbps SGMII Riser card > - 10Gbps XAUI Riser card > - Accelerator: > - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC > - SerDes: > - 8 lanes up to 10.3125GHz > - Supports SGMII, HiGig, XFI, XAUI and Aurora debug, > - IFC: > - 512MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA > - eSPI: > - Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040) > - USB: > - Two USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB) > - PCIe: > - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV) > - eSDHC: > - Supports various SD/SDHC/SDXC/eMMC devices with adapter cards and > voltage translators > - I2C: > - Four I2C controllers. > - UART: > - Dual 4-pins UART serial ports > > Signed-off-by: Shengzhou Liu <shengzhou....@freescale.com> > --- > v3: add fixup devicetree for t2081qds. > v2: some update for serdes and network configuration.
Applied to u-boot-mpc85xx/master. Thanks. York _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
