On 02/21/2014 09:57 PM, Chin Liang See wrote: > To enable the DesignWare watchdog support at SOCFPGA Cyclone V > dev kit. > > Signed-off-by: Chin Liang See <cl...@altera.com> > Cc: Anatolij Gustschin <ag...@denx.de> > Cc: Albert Aribaud <albert.u.b...@aribaud.net> > Cc: Heiko Schocher <h...@denx.de> > Cc: Tom Rini <tr...@ti.com> > --- > Changes for v3 > - Split to 2 series patch > Changes for v2 > - Enable this driver at socfpga_cyclone5 board > --- > .../include/asm/arch-socfpga/socfpga_base_addrs.h | 1 + > include/configs/socfpga_cyclone5.h | 13 +++++++++++++ > 2 files changed, 14 insertions(+) > > diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h > b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h > index 20f12e0..5f73824 100644 > --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h > +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h > @@ -11,6 +11,7 @@ > #define SOCFPGA_UART0_ADDRESS 0xffc02000 > #define SOCFPGA_UART1_ADDRESS 0xffc03000 > #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000 > +#define SOCFPGA_L4WD0_ADDRESS 0xffd02000 > #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000 > #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 > #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000 > diff --git a/include/configs/socfpga_cyclone5.h > b/include/configs/socfpga_cyclone5.h > index fc921ee..1b78ccb 100644 > --- a/include/configs/socfpga_cyclone5.h > +++ b/include/configs/socfpga_cyclone5.h > @@ -207,6 +207,16 @@ > #define CONFIG_ENV_IS_NOWHERE > > /* > + * L4 Watchdog > + */
Why multiline comment here? > +#define CONFIG_HW_WATCHDOG > +#define CONFIG_HW_WATCHDOG_TIMEOUT_MS 2000 > +#define CONFIG_DESIGNWARE_WATCHDOG > +#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS Why not just use SOCFPGA_L4WD0_ADDRESS directly? Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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