On Saturday, January 18, 2014 at 09:06:29 PM, Jagannadha Sutradharudu Teki
wrote:
> - Shrink spi_slave {}
> - Shrink spi_flash_params {}
> - Documentation for sf features
>
> Signed-off-by: Jagannadha Sutradharudu Teki <jaga...@xilinx.com>
> Cc: Marek Vasut <ma...@denx.de>
> ---
> doc/SPI/README.sf-features | 122 ++++++++++++++++++++++++++++++
> drivers/mtd/spi/sf.c | 4 +-
> drivers/mtd/spi/sf_internal.h | 1 -
> drivers/mtd/spi/sf_ops.c | 8 +-
> drivers/mtd/spi/sf_params.c | 172
> +++++++++++++++++++++--------------------- drivers/mtd/spi/sf_probe.c |
> 71 ++++++++---------
> include/spi.h | 42 ++++-------
> include/spi_flash.h | 24 +++---
> 8 files changed, 270 insertions(+), 174 deletions(-)
> create mode 100644 doc/SPI/README.sf-features
>
> diff --git a/doc/SPI/README.sf-features b/doc/SPI/README.sf-features
> new file mode 100644
> index 0000000..d35f56d
> --- /dev/null
> +++ b/doc/SPI/README.sf-features
> @@ -0,0 +1,122 @@
> +SPI FLASH feature enhancements:
> +==============================
> +
> +This document describes how to extend the current data structures in spi
> subsystem +for making use of new flash features/operations w.r.t to
> controller driver support. +
> +1. spi_slave:
> +
> +struct spi_slave {
> + ..........
> + u32 mode_bits;
> + ........
> +};
> +
> +@mode_bits can be used to expose the SPI RX/TX operation modes, bus
> options and +few flags which are used to extended the flash specific
> features/operations +- include/spi.h
> +
> +mode_bits:
> +- SPI_TX_QPP: 4-Wire tx transfer operation quad page program
> +- SPI_RX_SLOW: 1-wire rx transfer operation array slow read
> +- SPI_RX_DUAL: 2-wire rx transfer operation dual fast read
> +- SPI_RX_DUAL_IO: 2-wire rx transfer operation dual io fast read
> +- SPI_RX_QUAD: 4-wire rx transfer operation quad fast read
> +- SPI_RX_QUAD_IO: 4-wire rx transfer operation quad io fast read
> +- SPI_SHARED: dual flash devices are connected in shared bus connection
> +- SPI_SEPARATED: dual flash devices are connected in separate bus
> connection +- SPI_U_PAGE: select the upper flash in dual flash shared bus
> connection [1] +
A generic SPI controller _does_ _not_ _care_ about any SPI flash crud. The SPI
bus controller (which is what this is for) and SPI-NOR controller are two
different things and must have two different slave structures.
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