On 1/10/2014 7:40 AM, Po Liu wrote:
Using the TPL method for nand boot by sram was already
supported. Here add some code for mpc85xx ifc nand boot.

        - For ifc, elbc, esdhc, espi, all need the SPL without
        section .resetvec.
        - Use a clear function name for nand spl boot.
        - Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c
        in spl/Makefile;

Signed-off-by: Po Liu <po....@freescale.com>
---
changes for v2:
        - seperate public code and c29xpcie board code
        - add ifc support
changes for v3:
        - remove the redundant plus
        - ifc support use CONFIG_SPL_DRIVERS_MISC_SUPPORT
changes for v4:
        - modify the nand_load function
        - add comments in README.SPL
changes for v5:
        -none
changes for v6:
        - modify the readme file for the include lib file

  arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 15 ++++++++-------
  doc/README.SPL                          |  1 +
  drivers/mtd/nand/fsl_ifc_spl.c          | 31 ++++++++++++++++++++++++-------
  spl/Makefile                            |  1 +
  4 files changed, 34 insertions(+), 14 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds 
b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
index bc13267..acaa093 100644
--- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
@@ -57,7 +57,14 @@ SECTIONS
        . = ALIGN(8);
        __init_begin = .;
        __init_end = .;
-/* FIXME for non-NAND SPL */
+
+/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
+#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
+       .bootpg ADDR(.text) - 0x1000 :
+       {
+               KEEP(*(.bootpg))
+       } :text = 0xffff
+#else
  #if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
        .bootpg ADDR(.text) + 0x1000 :
        {
@@ -69,12 +76,6 @@ SECTIONS
  #else
  #error unknown NAND controller
  #endif
-#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
-       .bootpg ADDR(.text) - 0x1000 :
-       {
-               KEEP(*(.bootpg))
-       } :text = 0xffff
-#else
        .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
                KEEP(*(.resetvec))
        } = 0xffff
diff --git a/doc/README.SPL b/doc/README.SPL
index 312a6a6..b1bc3ca 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -62,6 +62,7 @@ CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
  CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
  CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
  CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
+CONFIG_SPL_DRIVERS_MISC_SUPPORT (drivers/misc)
  CONFIG_SPL_DMA_SUPPORT (drivers/dma/libdma.o)
  CONFIG_SPL_POST_MEM_SUPPORT (post/drivers/memory.o)
  CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/nand_spl_load.o)
diff --git a/drivers/mtd/nand/fsl_ifc_spl.c b/drivers/mtd/nand/fsl_ifc_spl.c
index 9de327b..6b43496 100644
--- a/drivers/mtd/nand/fsl_ifc_spl.c
+++ b/drivers/mtd/nand/fsl_ifc_spl.c
@@ -88,7 +88,11 @@ static inline int bad_block(uchar *marker, int port_size)
                return __raw_readw((u16 *)marker) != 0xffff;
  }
-static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
+#ifdef CONFIG_TPL_BUILD
+int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
+#else
+static int nand_load(uint32_t offs, unsigned int uboot_size, void *vdst)
+#endif

nand_load definition is
    static void nand_load(unsigned int offs, int uboot_size, uchar *dst);

have you checked the compilation warning for non TPL framework?

Regards,
Prabhakar


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