CPUs arm946es, ixp and sa1100 all define the reset_cpu()
function in their start.S file. Move this cpu-specific code
into cpu.c so that start.S only contains ARM generic code.
Signed-off-by: Albert ARIBAUD <albert.u.b...@aribaud.net>
---
arch/arm/cpu/arm946es/cpu.c | 12 ++++++++++++
arch/arm/cpu/arm946es/start.S | 23 -----------------------
arch/arm/cpu/ixp/cpu.c | 9 +++++++++
arch/arm/cpu/ixp/start.S | 24 ------------------------
arch/arm/cpu/sa1100/cpu.c | 14 ++++++++++++++
arch/arm/cpu/sa1100/start.S | 10 ----------
6 files changed, 35 insertions(+), 57 deletions(-)
diff --git a/arch/arm/cpu/arm946es/cpu.c b/arch/arm/cpu/arm946es/cpu.c
index 0c8d92d..add0a4a 100644
--- a/arch/arm/cpu/arm946es/cpu.c
+++ b/arch/arm/cpu/arm946es/cpu.c
@@ -16,6 +16,7 @@
#include <common.h>
#include <command.h>
#include <asm/system.h>
+#include <asm/io.h>
static void cache_flush(void);
@@ -51,3 +52,14 @@ static void cache_flush (void)
asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
asm ("mcr p15, 0, %0, c7, c6, 0": :"r" (i));
}
+
+#ifndef CONFIG_INTEGRATOR
+
+__attribute__((noreturn)) void reset_cpu(ulong addr __attribute__((unused)))
+{
+ writew(0x0, 0xfffece10);
+ writew(0x8, 0xfffece10);
+ for (;;) {}
+}
+
+#endif /* #ifdef CONFIG_INTEGRATOR */
diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index 7d50145..534592f 100644
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -320,26 +320,3 @@ fiq:
bl do_fiq
#endif
-
-# ifdef CONFIG_INTEGRATOR
-
- /* Satisfied by general board level routine */
-
-#else
-
- .align 5
-.globl reset_cpu
-reset_cpu:
-
- ldr r1, rstctl1 /* get clkm1 reset ctl */
- mov r3, #0x0
- strh r3, [r1] /* clear it */
- mov r3, #0x8
- strh r3, [r1] /* force dsp+arm reset */
-_loop_forever:
- b _loop_forever
-
-rstctl1:
- .word 0xfffece10
-
-#endif /* #ifdef CONFIG_INTEGRATOR */
diff --git a/arch/arm/cpu/ixp/cpu.c b/arch/arm/cpu/ixp/cpu.c
index 4387c18..2c20307 100644
--- a/arch/arm/cpu/ixp/cpu.c
+++ b/arch/arm/cpu/ixp/cpu.c
@@ -19,6 +19,7 @@
#include <netdev.h>
#include <asm/arch/ixp425.h>
#include <asm/system.h>
+#include <asm/io.h>
static void cache_flush(void);
@@ -98,3 +99,11 @@ int cpu_eth_init(bd_t *bis)
#endif
return 0;
}
+
+__attribute__((noreturn)) void reset_cpu(ulong addr __attribute__((unused)))
+{
+ writel(0x482e, IXP425_OSWK);
+ writel(0x0fff, IXP425_OSWT);
+ writel(0x5, IXP425_OSWE);
+ for (;;) {}
+}
diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S
index 80ef443..0641593 100644
--- a/arch/arm/cpu/ixp/start.S
+++ b/arch/arm/cpu/ixp/start.S
@@ -378,27 +378,3 @@ fiq:
bl do_fiq
#endif
-
-/****************************************************************************/
-/* */
-/* Reset function: Use Watchdog to reset */
-/* */
-/****************************************************************************/
-
- .align 5
-.globl reset_cpu
-
-reset_cpu:
- ldr r1, =0x482e
- ldr r2, =IXP425_OSWK
- str r1, [r2]
- ldr r1, =0x0fff
- ldr r2, =IXP425_OSWT
- str r1, [r2]
- ldr r1, =0x5
- ldr r2, =IXP425_OSWE
- str r1, [r2]
- b reset_endless
-
-reset_endless:
- b reset_endless
diff --git a/arch/arm/cpu/sa1100/cpu.c b/arch/arm/cpu/sa1100/cpu.c
index 6651898..9620ac6 100644
--- a/arch/arm/cpu/sa1100/cpu.c
+++ b/arch/arm/cpu/sa1100/cpu.c
@@ -17,6 +17,7 @@
#include <common.h>
#include <command.h>
#include <asm/system.h>
+#include <asm/io.h>
#ifdef CONFIG_USE_IRQ
DECLARE_GLOBAL_DATA_PTR;
@@ -52,3 +53,16 @@ static void cache_flush (void)
asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
}
+
+#define RST_BASE 0x90030000
+#define RSRR 0x00
+#define RCSR 0x04
+
+__attribute__((noreturn)) void reset_cpu(ulong addr __attribute__((unused)))
+{
+ while(1) /* repeat endlessly */
+ {
+ writel(0, RST_BASE + RCSR);
+ writel(1, RST_BASE + RSRR);
+ }
+}
diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index bf80937..472a595 100644
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -337,13 +337,3 @@ fiq:
bl do_fiq
#endif
-
- .align 5
-.globl reset_cpu
-reset_cpu:
- ldr r0, RST_BASE
- mov r1, #0x0 @ set bit 3-0 ...
- str r1, [r0, #RCSR] @ ... to clear in RCSR
- mov r1, #0x1
- str r1, [r0, #RSRR] @ and perform reset
- b reset_cpu @ silly, but repeat endlessly
--
1.8.3.2
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
