Hi Heiko,
On 11/04/2013 07:40 AM, Heiko Schocher wrote:
> enable support for the siemens AT91SAM9G20 based board corvus.
>
> Signed-off-by: Boris Schmidt <boris.schm...@siemens.com>
> Reviewed-by: Heiko Schocher <h...@denx.de>
> Cc: Andreas Bießmann <andreas.de...@googlemail.com>
> Cc: Bo Shen <voice.s...@atmel.com>
>
> ---
> - changes for v2:
> - add comments from Bo Shen
> - use gpio api
> - remove unneccessary comment
> - use at91_wait_for_reset()
> - remove unneccessary code in board file
> - Coding Style cleanup (tabs and unneccessary 1 after config define
> removed, use ".xxx = x" notation for initializing structs)
> - remove reset_phy()
> - remove CONFIG_SYS_MEMTEST_x defines, as mtest command
> is not used on this board.
> - changes load address
> - delete lcd support
> - add comments from Andreas Bießmann:
> - rearrange some init calls
> - remove some unneeded ifdef
> ---
> board/siemens/corvus/Makefile | 39 ++++++++
> board/siemens/corvus/board.c | 216
> ++++++++++++++++++++++++++++++++++++++++++
> boards.cfg | 1 +
> include/configs/corvus.h | 165 ++++++++++++++++++++++++++++++++
> 4 files changed, 421 insertions(+)
> create mode 100644 board/siemens/corvus/Makefile
> create mode 100644 board/siemens/corvus/board.c
> create mode 100644 include/configs/corvus.h
>
> diff --git a/board/siemens/corvus/Makefile b/board/siemens/corvus/Makefile
> new file mode 100644
> index 0000000..88981d8
> --- /dev/null
> +++ b/board/siemens/corvus/Makefile
> @@ -0,0 +1,39 @@
> +#
> +# Makefile for siemens CORVUS (AT91SAM9G45) based board
> +# (C) Copyright 2013 Siemens AG
> +#
> +# Based on:
> +# U-Boot file: board/atmel/at91sam9m10g45ek/Makefile
> +#
> +# (C) Copyright 2003-2008
> +# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
> +#
> +# (C) Copyright 2008
> +# Stelian Pop <stel...@popies.net>
> +# Lead Tech Design <www.leadtechdesign.com>
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB = $(obj)lib$(BOARD).o
> +
> +COBJS-y += board.o
> +
> +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS-y))
> +SOBJS := $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB): $(obj).depend $(OBJS) $(SOBJS)
> + $(call cmd_link_o_target, $(OBJS) $(SOBJS))
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c
> new file mode 100644
> index 0000000..11f0d49
> --- /dev/null
> +++ b/board/siemens/corvus/board.c
> @@ -0,0 +1,216 @@
> +/*
> + * Board functions for Siemens CORVUS (AT91SAM9G45) based board
> + * (C) Copyright 2013 Siemens AG
> + *
> + * Based on:
> + * U-Boot file: board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
> + * (C) Copyright 2007-2008
> + * Stelian Pop <stel...@popies.net>
> + * Lead Tech Design <www.leadtechdesign.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <asm/arch/at91sam9g45_matrix.h>
> +#include <asm/arch/at91sam9_smc.h>
> +#include <asm/arch/at91_common.h>
> +#include <asm/arch/at91_pmc.h>
> +#include <asm/arch/at91_rstc.h>
> +#include <asm/arch/gpio.h>
> +#include <asm/arch/clk.h>
> +#include <lcd.h>
> +#include <atmel_lcdc.h>
> +#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
> +#include <net.h>
> +#endif
> +#include <netdev.h>
> +#include <spi.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#ifdef CONFIG_CMD_NAND
> +static void corvus_nand_hw_init(void)
> +{
> + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
> + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> + unsigned long csa;
> +
> + /* Enable CS3 */
> + csa = readl(&matrix->ebicsa);
> + csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
> + writel(csa, &matrix->ebicsa);
> +
> + /* Configure SMC CS3 for NAND/SmartMedia */
> + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
> + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
> + &smc->cs[3].setup);
> + writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
> + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(2),
> + &smc->cs[3].pulse);
> + writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(4),
> + &smc->cs[3].cycle);
> + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
> + AT91_SMC_MODE_EXNW_DISABLE |
> +#ifdef CONFIG_SYS_NAND_DBW_16
> + AT91_SMC_MODE_DBW_16 |
> +#else /* CONFIG_SYS_NAND_DBW_8 */
> + AT91_SMC_MODE_DBW_8 |
> +#endif
> + AT91_SMC_MODE_TDF_CYCLE(3),
> + &smc->cs[3].mode);
> +
> + writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
> +
> + /* Configure RDY/BSY */
> + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
> +
> + /* Enable NandFlash */
> + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
> +}
> +#endif
> +
> +#ifdef CONFIG_CMD_USB
> +static void at91sam9m10g45ek_usb_hw_init(void)
> +{
> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> +
> + writel(1 << ATMEL_ID_PIODE, &pmc->pcer);
> +
> + at91_set_gpio_output(AT91_PIN_PD1, 0);
> + at91_set_gpio_output(AT91_PIN_PD3, 0);
> +}
> +#endif
> +
> +#ifdef CONFIG_MACB
> +static void corvus_macb_hw_init(void)
> +{
> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> + struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
> + unsigned long erstl;
> +
> + /* Enable clock */
> + writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
> +
> + /*
> + * Disable pull-up on:
> + * RXDV (PA15) => PHY normal mode (not Test mode)
> + * ERX0 (PA12) => PHY ADDR0
> + * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
> + *
> + * PHY has internal pull-down
> + */
> + at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0);
Here applies the same statement as for the taurus board: Could you
please wait for 'ATMEL_LEGACY' PIO API change or provide at91 portmux
API (I think the AVR32 portmux API is a good starting point).
> +
> + erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
> +
> + /* Need to reset PHY -> 500ms reset */
> + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
> + AT91_RSTC_MR_URSTEN, &rstc->mr);
> +
> + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
> +
> + /* Wait for end of reset */
> + at91_wait_for_reset(100);
You say above, that this will be 500ms reset pulse ... but wait just
100ms. Is that Ok?
Please also check the taurus board.
> +
> + /* Restore NRST value */
> + writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
> + &rstc->mr);
> +
> + /* Re-enable pull-up */
> + at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1);
> +
> + /* And the pins. */
> + at91_macb_hw_init();
> +}
> +#endif
> +
> +int board_early_init_f(void)
> +{
> + at91_seriald_hw_init();
> + return 0;
> +}
> +
> +int board_init(void)
> +{
> + /* address of boot parameters */
> + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
> +
> +#ifdef CONFIG_CMD_NAND
> + corvus_nand_hw_init();
> +#endif
> +#ifdef CONFIG_ATMEL_SPI
> + at91_spi0_hw_init(1 << 4);
> +#endif
> +#ifdef CONFIG_HAS_DATAFLASH
> + at91_spi0_hw_init(1 << 0);
> +#endif
> +#ifdef CONFIG_MACB
> + corvus_macb_hw_init();
> +#endif
> +#ifdef CONFIG_CMD_USB
> + at91sam9m10g45ek_usb_hw_init();
NAK, this is located in another board file (at91sam9m10g45ek), please adopt.
> +#endif
> + return 0;
> +}
> +
> +#ifdef CONFIG_RESET_PHY_R
Why provide empty reset_phy? Just remove the CONFIG_RESET_PHY_R in board
config.
> +void reset_phy(void)
> +{
> +}
> +#endif
> +
> +int dram_init(void)
> +{
> + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
> + CONFIG_SYS_SDRAM_SIZE);
> + return 0;
> +}
> +
> +int board_eth_init(bd_t *bis)
> +{
> + int rc = 0;
> +#ifdef CONFIG_MACB
> + rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
> +#endif
> + return rc;
> +}
> +
> +/* SPI chip select control */
> +int spi_cs_is_valid(unsigned int bus, unsigned int cs)
> +{
> + return bus == 0 && cs < 2;
> +}
> +
> +void spi_cs_activate(struct spi_slave *slave)
> +{
> + switch (slave->cs) {
> + case 1:
> + at91_set_gpio_output(AT91_PIN_PB18, 0);
> + break;
> + case 0:
> + default:
> + at91_set_gpio_output(AT91_PIN_PB3, 0);
> + break;
> + }
> +}
> +
> +void spi_cs_deactivate(struct spi_slave *slave)
> +{
> + switch (slave->cs) {
> + case 1:
> + at91_set_gpio_output(AT91_PIN_PB18, 1);
> + break;
> + case 0:
> + default:
> + at91_set_gpio_output(AT91_PIN_PB3, 1);
> + break;
> + }
> +}
> diff --git a/boards.cfg b/boards.cfg
> index 0fe98d0..a207e4a 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -140,6 +140,7 @@ Active arm arm926ejs at91 ronetix
> pm9g45
> Active arm arm926ejs at91 taskit stamp9g20
> portuxg20 stamp9g20:AT91SAM9G20,PORTUXG20
>
> Markus Hubig <mhu...@imko.de>
> Active arm arm926ejs at91 taskit stamp9g20
> stamp9g20 stamp9g20:AT91SAM9G20
>
> Markus Hubig <mhu...@imko.de>
> Active arm arm926ejs at91 siemens taurus
> axm
> taurus:AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM
> Heiko Schocher
> <h...@denx.de>
> +Active arm arm926ejs at91 siemens corvus
> corvus
> corvus:AT91SAM9M10G45,SYS_USE_NANDFLASH
> Heiko Schocher
> <h...@denx.de>
> Active arm arm926ejs at91 siemens taurus
> taurus
> taurus:AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS
> Heiko Schocher
> <h...@denx.de>
> Active arm arm926ejs davinci ait cam_enc_4xx
> cam_enc_4xx cam_enc_4xx
>
> Heiko Schocher <h...@denx.de>
> Active arm arm926ejs davinci Barix ipam390
> ipam390 -
>
> Heiko Schocher <h...@denx.de>
> diff --git a/include/configs/corvus.h b/include/configs/corvus.h
> new file mode 100644
> index 0000000..b864562
> --- /dev/null
> +++ b/include/configs/corvus.h
> @@ -0,0 +1,165 @@
> +/*
> + * Common board functions for siemens AT91SAM9G45 based boards
> + * (C) Copyright 2013 Siemens AG
> + *
> + * Based on:
> + * U-Boot file: include/configs/at91sam9m10g45ek.h
> + * (C) Copyright 2007-2008
> + * Stelian Pop <stel...@popies.net>
> + * Lead Tech Design <www.leadtechdesign.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#include <asm/hardware.h>
> +
> +#define MACH_TYPE_CORVUS 2066
> +
> +/*
> + * Warning: changing CONFIG_SYS_TEXT_BASE requires
> + * adapting the initial boot program.
> + * Since the linker has to swallow that define, we must use a pure
> + * hex number here!
> + */
> +
> +#define CONFIG_SYS_TEXT_BASE 0x73f00000
> +
> +#define CONFIG_AT91_LEGACY
> +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
> +
> +/* ARM asynchronous clock */
> +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
> +#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
> +#define CONFIG_SYS_HZ 1000
> +
> +#define CONFIG_AT91FAMILY
> +
> +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
> +#define CONFIG_SETUP_MEMORY_TAGS
> +#define CONFIG_INITRD_TAG
> +#define CONFIG_SKIP_LOWLEVEL_INIT
> +#define CONFIG_BOARD_EARLY_INIT_F
> +#define CONFIG_DISPLAY_CPUINFO
> +
> +#define CONFIG_CMD_BOOTZ
> +#define CONFIG_OF_LIBFDT
> +
> +/* general purpose I/O */
> +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
> +#define CONFIG_AT91_GPIO
> +#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral
> pins */
> +
> +/* serial console */
> +#define CONFIG_ATMEL_USART
> +#define CONFIG_USART_BASE ATMEL_BASE_DBGU
> +#define CONFIG_USART_ID ATMEL_ID_SYS
> +
> +/* LED */
> +#define CONFIG_AT91_LED
> +#define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1
> led */
> +#define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2
> led */
Could you please remove the <tab> between 'define' and defined name.
> +
> +#define CONFIG_BOOTDELAY 3
> +
> +/*
> + * BOOTP options
> + */
> +#define CONFIG_BOOTP_BOOTFILESIZE
> +#define CONFIG_BOOTP_BOOTPATH
> +#define CONFIG_BOOTP_GATEWAY
> +#define CONFIG_BOOTP_HOSTNAME
> +
> +/*
> + * Command line configuration.
> + */
> +#include <config_cmd_default.h>
> +#undef CONFIG_CMD_BDI
> +#undef CONFIG_CMD_FPGA
> +#undef CONFIG_CMD_IMI
> +#undef CONFIG_CMD_IMLS
> +#undef CONFIG_CMD_LOADS
> +
> +#define CONFIG_CMD_PING
> +#define CONFIG_CMD_DHCP
> +#define CONFIG_CMD_NAND
> +#define CONFIG_CMD_USB
> +
> +/* SDRAM */
> +#define CONFIG_NR_DRAM_BANKS 1
> +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
> +#define CONFIG_SYS_SDRAM_SIZE 0x08000000
> +
> +#define CONFIG_SYS_INIT_SP_ADDR \
> + (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
> +
> +/* No NOR flash */
> +#define CONFIG_SYS_NO_FLASH
> +
> +/* NAND flash */
> +#ifdef CONFIG_CMD_NAND
> +#define CONFIG_NAND_ATMEL
> +#define CONFIG_SYS_MAX_NAND_DEVICE 1
> +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
> +#define CONFIG_SYS_NAND_DBW_8
> +/* our ALE is AD21 */
> +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
> +/* our CLE is AD22 */
> +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
> +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
> +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
> +
> +#endif
> +
> +/* Ethernet */
> +#define CONFIG_MACB
> +#define CONFIG_RMII
> +#define CONFIG_NET_RETRY_COUNT 20
> +#define CONFIG_RESET_PHY_R
> +
> +/* USB */
> +#define CONFIG_USB_EHCI
> +#define CONFIG_USB_EHCI_ATMEL
> +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
> +#define CONFIG_DOS_PARTITION
> +#define CONFIG_USB_STORAGE
> +
> +#define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */
> +
> +/* bootstrap + u-boot + env in nandflash */
> +#define CONFIG_ENV_IS_IN_NAND
> +#define CONFIG_ENV_OFFSET 0x100000
> +#define CONFIG_ENV_OFFSET_REDUND 0x180000
> +#define CONFIG_ENV_SIZE 0x20000
> +
> +#define CONFIG_BOOTCOMMAND \
> + "nand read 0x70000000 0x200000 0x300000;" \
> + "bootm 0x70000000"
> +#define CONFIG_BOOTARGS
> \
> + "console=ttyS0,115200 earlyprintk " \
> + "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
> + "256k(env),256k(env_redundant),256k(spare)," \
> + "512k(dtb),6M(kernel)ro,-(rootfs) " \
> + "root=/dev/mtdblock7 rw rootfstype=jffs2"
> +
> +#define CONFIG_BAUDRATE 115200
> +
> +#define CONFIG_SYS_PROMPT "U-Boot> "
> +#define CONFIG_SYS_CBSIZE 256
> +#define CONFIG_SYS_MAXARGS 16
> +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
> + sizeof(CONFIG_SYS_PROMPT) + 16)
> +#define CONFIG_SYS_LONGHELP
> +#define CONFIG_CMDLINE_EDITING
> +#define CONFIG_AUTO_COMPLETE
> +#define CONFIG_SYS_HUSH_PARSER
> +
> +/*
> + * Size of malloc() pool
> + */
> +#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
> + 128*1024, 0x1000)
> +
> +#endif
>
Best regards
Andreas Bießmann
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