This is in preparation for adapting this board to function correctly on
a physical MIPS Malta board.
Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---
arch/mips/lib/bootm.c | 12 ++---
board/malta/Makefile | 29 ++++++++++
board/malta/lowlevel_init.S | 69 ++++++++++++++++++++++++
board/malta/malta.c | 47 ++++++++++++++++
board/qemu-malta/Makefile | 29 ----------
board/qemu-malta/lowlevel_init.S | 69 ------------------------
board/qemu-malta/qemu-malta.c | 47 ----------------
boards.cfg | 4 +-
include/configs/malta.h | 114 +++++++++++++++++++++++++++++++++++++++
include/configs/qemu-malta.h | 114 ---------------------------------------
10 files changed, 267 insertions(+), 267 deletions(-)
create mode 100644 board/malta/Makefile
create mode 100644 board/malta/lowlevel_init.S
create mode 100644 board/malta/malta.c
delete mode 100644 board/qemu-malta/Makefile
delete mode 100644 board/qemu-malta/lowlevel_init.S
delete mode 100644 board/qemu-malta/qemu-malta.c
create mode 100644 include/configs/malta.h
delete mode 100644 include/configs/qemu-malta.h
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index 66340ea..1febf29 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -17,10 +17,10 @@ DECLARE_GLOBAL_DATA_PTR;
#define LINUX_MAX_ENVS 256
#define LINUX_MAX_ARGS 256
-#if defined(CONFIG_QEMU_MALTA)
-#define mips_boot_qemu_malta 1
+#if defined(CONFIG_MALTA)
+#define mips_boot_malta 1
#else
-#define mips_boot_qemu_malta 0
+#define mips_boot_malta 0
#endif
static int linux_argc;
@@ -139,7 +139,7 @@ static void linux_env_set(const char *env_name, const char
*env_val)
strcpy(linux_env_p, env_name);
linux_env_p += strlen(env_name);
- if (mips_boot_qemu_malta) {
+ if (mips_boot_malta) {
linux_env_p++;
linux_env[++linux_env_idx] = linux_env_p;
} else {
@@ -196,7 +196,7 @@ static void boot_prep_linux(bootm_headers_t *images)
if (cp)
linux_env_set("eth1addr", cp);
- if (mips_boot_qemu_malta)
+ if (mips_boot_malta)
linux_env_set("modetty0", "38400n8r");
}
@@ -210,7 +210,7 @@ static void boot_jump_linux(bootm_headers_t *images)
bootstage_mark(BOOTSTAGE_ID_RUN_OS);
- if (mips_boot_qemu_malta)
+ if (mips_boot_malta)
linux_extra = gd->ram_size;
/* we assume that the kernel is in place */
diff --git a/board/malta/Makefile b/board/malta/Makefile
new file mode 100644
index 0000000..7060341
--- /dev/null
+++ b/board/malta/Makefile
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2003-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS = $(BOARD).o
+SOBJS = lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/malta/lowlevel_init.S b/board/malta/lowlevel_init.S
new file mode 100644
index 0000000..fa0b6a7
--- /dev/null
+++ b/board/malta/lowlevel_init.S
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2013 Gabor Juhos <juh...@openwrt.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <config.h>
+#include <gt64120.h>
+
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+#include <asm/malta.h>
+
+#ifdef CONFIG_SYS_BIG_ENDIAN
+#define CPU_TO_GT32(_x) ((_x))
+#else
+#define CPU_TO_GT32(_x) ( \
+ (((_x) & 0xff) << 24) | (((_x) & 0xff00) << 8) | \
+ (((_x) & 0xff0000) >> 8) | (((_x) & 0xff000000) >> 24))
+#endif
+
+ .text
+ .set noreorder
+ .set mips32
+
+ .globl lowlevel_init
+lowlevel_init:
+
+ /*
+ * Load BAR registers of GT64120 as done by YAMON
+ *
+ * based on a patch sent by Antony Pavlov <antonynpav...@gmail.com>
+ * to the barebox mailing list.
+ * The subject of the original patch:
+ * 'MIPS: qemu-malta: add YAMON-style GT64120 memory map'
+ * URL:
+ * http://www.mail-archive.com/barebox@lists.infradead.org/msg06128.html
+ *
+ * based on write_bootloader() in qemu.git/hw/mips_malta.c
+ * see GT64120 manual and qemu.git/hw/gt64xxx.c for details
+ */
+
+ /* move GT64120 registers from 0x14000000 to 0x1be00000 */
+ li t1, KSEG1ADDR(GT_DEF_BASE)
+ li t0, CPU_TO_GT32(0xdf000000)
+ sw t0, GT_ISD_OFS(t1)
+
+ /* setup MEM-to-PCI0 mapping */
+ li t1, KSEG1ADDR(MALTA_GT_BASE)
+
+ /* setup PCI0 io window to 0x18000000-0x181fffff */
+ li t0, CPU_TO_GT32(0xc0000000)
+ sw t0, GT_PCI0IOLD_OFS(t1)
+ li t0, CPU_TO_GT32(0x40000000)
+ sw t0, GT_PCI0IOHD_OFS(t1)
+
+ /* setup PCI0 mem windows */
+ li t0, CPU_TO_GT32(0x80000000)
+ sw t0, GT_PCI0M0LD_OFS(t1)
+ li t0, CPU_TO_GT32(0x3f000000)
+ sw t0, GT_PCI0M0HD_OFS(t1)
+
+ li t0, CPU_TO_GT32(0xc1000000)
+ sw t0, GT_PCI0M1LD_OFS(t1)
+ li t0, CPU_TO_GT32(0x5e000000)
+ sw t0, GT_PCI0M1HD_OFS(t1)
+
+ jr ra
+ nop
diff --git a/board/malta/malta.c b/board/malta/malta.c
new file mode 100644
index 0000000..7eddf1c
--- /dev/null
+++ b/board/malta/malta.c
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2013 Gabor Juhos <juh...@openwrt.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <netdev.h>
+
+#include <asm/addrspace.h>
+#include <asm/io.h>
+#include <asm/malta.h>
+#include <pci_gt64120.h>
+
+phys_size_t initdram(int board_type)
+{
+ return CONFIG_SYS_MEM_SIZE;
+}
+
+int checkboard(void)
+{
+ puts("Board: MIPS Malta CoreLV (Qemu)\n");
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ return pci_eth_init(bis);
+}
+
+void _machine_restart(void)
+{
+ void __iomem *reset_base;
+
+ reset_base = (void __iomem *)CKSEG1ADDR(MALTA_RESET_BASE);
+ __raw_writel(GORESET, reset_base);
+}
+
+void pci_init_board(void)
+{
+ set_io_port_base(CKSEG1ADDR(MALTA_IO_PORT_BASE));
+
+ gt64120_pci_init((void *)CKSEG1ADDR(MALTA_GT_BASE),
+ 0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE,
+ 0x10000000, 0x10000000, 128 * 1024 * 1024,
+ 0x00000000, 0x00000000, 0x20000);
+}
diff --git a/board/qemu-malta/Makefile b/board/qemu-malta/Makefile
deleted file mode 100644
index 7060341..0000000
--- a/board/qemu-malta/Makefile
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2003-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-SOBJS = lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/qemu-malta/lowlevel_init.S b/board/qemu-malta/lowlevel_init.S
deleted file mode 100644
index fa0b6a7..0000000
--- a/board/qemu-malta/lowlevel_init.S
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright (C) 2013 Gabor Juhos <juh...@openwrt.org>
- *
- * SPDX-License-Identifier: GPL-2.0
- */
-
-#include <config.h>
-#include <gt64120.h>
-
-#include <asm/addrspace.h>
-#include <asm/regdef.h>
-#include <asm/malta.h>
-
-#ifdef CONFIG_SYS_BIG_ENDIAN
-#define CPU_TO_GT32(_x) ((_x))
-#else
-#define CPU_TO_GT32(_x) ( \
- (((_x) & 0xff) << 24) | (((_x) & 0xff00) << 8) | \
- (((_x) & 0xff0000) >> 8) | (((_x) & 0xff000000) >> 24))
-#endif
-
- .text
- .set noreorder
- .set mips32
-
- .globl lowlevel_init
-lowlevel_init:
-
- /*
- * Load BAR registers of GT64120 as done by YAMON
- *
- * based on a patch sent by Antony Pavlov <antonynpav...@gmail.com>
- * to the barebox mailing list.
- * The subject of the original patch:
- * 'MIPS: qemu-malta: add YAMON-style GT64120 memory map'
- * URL:
- * http://www.mail-archive.com/barebox@lists.infradead.org/msg06128.html
- *
- * based on write_bootloader() in qemu.git/hw/mips_malta.c
- * see GT64120 manual and qemu.git/hw/gt64xxx.c for details
- */
-
- /* move GT64120 registers from 0x14000000 to 0x1be00000 */
- li t1, KSEG1ADDR(GT_DEF_BASE)
- li t0, CPU_TO_GT32(0xdf000000)
- sw t0, GT_ISD_OFS(t1)
-
- /* setup MEM-to-PCI0 mapping */
- li t1, KSEG1ADDR(MALTA_GT_BASE)
-
- /* setup PCI0 io window to 0x18000000-0x181fffff */
- li t0, CPU_TO_GT32(0xc0000000)
- sw t0, GT_PCI0IOLD_OFS(t1)
- li t0, CPU_TO_GT32(0x40000000)
- sw t0, GT_PCI0IOHD_OFS(t1)
-
- /* setup PCI0 mem windows */
- li t0, CPU_TO_GT32(0x80000000)
- sw t0, GT_PCI0M0LD_OFS(t1)
- li t0, CPU_TO_GT32(0x3f000000)
- sw t0, GT_PCI0M0HD_OFS(t1)
-
- li t0, CPU_TO_GT32(0xc1000000)
- sw t0, GT_PCI0M1LD_OFS(t1)
- li t0, CPU_TO_GT32(0x5e000000)
- sw t0, GT_PCI0M1HD_OFS(t1)
-
- jr ra
- nop
diff --git a/board/qemu-malta/qemu-malta.c b/board/qemu-malta/qemu-malta.c
deleted file mode 100644
index 7eddf1c..0000000
--- a/board/qemu-malta/qemu-malta.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Copyright (C) 2013 Gabor Juhos <juh...@openwrt.org>
- *
- * SPDX-License-Identifier: GPL-2.0
- */
-
-#include <common.h>
-#include <netdev.h>
-
-#include <asm/addrspace.h>
-#include <asm/io.h>
-#include <asm/malta.h>
-#include <pci_gt64120.h>
-
-phys_size_t initdram(int board_type)
-{
- return CONFIG_SYS_MEM_SIZE;
-}
-
-int checkboard(void)
-{
- puts("Board: MIPS Malta CoreLV (Qemu)\n");
- return 0;
-}
-
-int board_eth_init(bd_t *bis)
-{
- return pci_eth_init(bis);
-}
-
-void _machine_restart(void)
-{
- void __iomem *reset_base;
-
- reset_base = (void __iomem *)CKSEG1ADDR(MALTA_RESET_BASE);
- __raw_writel(GORESET, reset_base);
-}
-
-void pci_init_board(void)
-{
- set_io_port_base(CKSEG1ADDR(MALTA_IO_PORT_BASE));
-
- gt64120_pci_init((void *)CKSEG1ADDR(MALTA_GT_BASE),
- 0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE,
- 0x10000000, 0x10000000, 128 * 1024 * 1024,
- 0x00000000, 0x00000000, 0x20000);
-}
diff --git a/boards.cfg b/boards.cfg
index aa2ee64..60b3f8b 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -480,8 +480,8 @@ Active m68k mcf547x_8x - freescale
m548xevb
Active m68k mcf547x_8x - freescale m548xevb
M5485GFE
M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=4,SYS_DRAMSZ=64
TsiChung Liew
<tsi-chung.l...@freescale.com>
Active m68k mcf547x_8x - freescale m548xevb
M5485HFE
M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO
TsiChung Liew
<tsi-chung.l...@freescale.com>
Active microblaze microblaze - xilinx
microblaze-generic microblaze-generic -
Michal Simek <mon...@monstr.eu>
-Active mips mips32 - - qemu-malta
qemu_malta qemu-malta:MIPS32,SYS_BIG_ENDIAN
-
-Active mips mips32 - - qemu-malta
qemu_maltael qemu-malta:MIPS32,SYS_LITTLE_ENDIAN
-
+Active mips mips32 - - malta
malta malta:MIPS32,SYS_BIG_ENDIAN
-
+Active mips mips32 - - malta
maltael malta:MIPS32,SYS_LITTLE_ENDIAN
-
Active mips mips32 - - qemu-mips
qemu_mips qemu-mips:SYS_BIG_ENDIAN
Vlad Lungu <vlad.lu...@windriver.com>
Active mips mips32 - - qemu-mips
qemu_mipsel qemu-mips:SYS_LITTLE_ENDIAN
-
Active mips mips32 - micronas vct
vct_platinum vct:VCT_PLATINUM
-
diff --git a/include/configs/malta.h b/include/configs/malta.h
new file mode 100644
index 0000000..f6f6cc1
--- /dev/null
+++ b/include/configs/malta.h
@@ -0,0 +1,114 @@
+/*
+ * Copyright (C) 2013 Gabor Juhos <juh...@openwrt.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef _QEMU_MALTA_CONFIG_H
+#define _QEMU_MALTA_CONFIG_H
+
+#include <asm/addrspace.h>
+#include <asm/malta.h>
+
+/*
+ * System configuration
+ */
+#define CONFIG_MALTA
+
+#define CONFIG_PCI
+#define CONFIG_PCI_GT64120
+#define CONFIG_PCI_PNP
+#define CONFIG_PCNET
+
+/*
+ * CPU Configuration
+ */
+#define CONFIG_SYS_MHZ 250 /* arbitrary value */
+#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
+#define CONFIG_SYS_HZ 1000
+
+#define CONFIG_SYS_DCACHE_SIZE 16384 /* arbitrary value */
+#define CONFIG_SYS_ICACHE_SIZE 16384 /* arbitrary value */
+#define CONFIG_SYS_CACHELINE_SIZE 32 /* arbitrary value */
+
+#define CONFIG_SWAP_IO_SPACE
+
+/*
+ * Memory map
+ */
+#define CONFIG_SYS_TEXT_BASE 0xbfc00000 /* Rom version */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+
+#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
+#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
+
+#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
+
+#define CONFIG_SYS_LOAD_ADDR 0x81000000
+#define CONFIG_SYS_MEMTEST_START 0x80100000
+#define CONFIG_SYS_MEMTEST_END 0x80800000
+
+#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
+#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
+
+/*
+ * Console configuration
+ */
+#if defined(CONFIG_SYS_LITTLE_ENDIAN)
+#define CONFIG_SYS_PROMPT "qemu-maltael # "
+#else
+#define CONFIG_SYS_PROMPT "qemu-malta # "
+#endif
+
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16
+
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+
+/*
+ * Serial driver
+ */
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK 115200
+#define CONFIG_SYS_NS16550_COM1 CKSEG1ADDR(MALTA_UART_BASE)
+#define CONFIG_CONS_INDEX 1
+
+/*
+ * Environment
+ */
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE 0x10000
+
+/*
+ * Flash configuration
+ */
+#define CONFIG_SYS_FLASH_BASE (KSEG1 | MALTA_FLASH_BASE)
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_MAX_FLASH_SECT 128
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+
+/*
+ * Commands
+ */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_NFS
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+
+#define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */
+
+#endif /* _QEMU_MALTA_CONFIG_H */
diff --git a/include/configs/qemu-malta.h b/include/configs/qemu-malta.h
deleted file mode 100644
index 4e7ad33..0000000
--- a/include/configs/qemu-malta.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * Copyright (C) 2013 Gabor Juhos <juh...@openwrt.org>
- *
- * SPDX-License-Identifier: GPL-2.0
- */
-
-#ifndef _QEMU_MALTA_CONFIG_H
-#define _QEMU_MALTA_CONFIG_H
-
-#include <asm/addrspace.h>
-#include <asm/malta.h>
-
-/*
- * System configuration
- */
-#define CONFIG_QEMU_MALTA
-
-#define CONFIG_PCI
-#define CONFIG_PCI_GT64120
-#define CONFIG_PCI_PNP
-#define CONFIG_PCNET
-
-/*
- * CPU Configuration
- */
-#define CONFIG_SYS_MHZ 250 /* arbitrary value */
-#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
-#define CONFIG_SYS_HZ 1000
-
-#define CONFIG_SYS_DCACHE_SIZE 16384 /* arbitrary value */
-#define CONFIG_SYS_ICACHE_SIZE 16384 /* arbitrary value */
-#define CONFIG_SYS_CACHELINE_SIZE 32 /* arbitrary value */
-
-#define CONFIG_SWAP_IO_SPACE
-
-/*
- * Memory map
- */
-#define CONFIG_SYS_TEXT_BASE 0xbfc00000 /* Rom version */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-
-#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
-#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
-
-#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
-
-#define CONFIG_SYS_LOAD_ADDR 0x81000000
-#define CONFIG_SYS_MEMTEST_START 0x80100000
-#define CONFIG_SYS_MEMTEST_END 0x80800000
-
-#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
-#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
-
-/*
- * Console configuration
- */
-#if defined(CONFIG_SYS_LITTLE_ENDIAN)
-#define CONFIG_SYS_PROMPT "qemu-maltael # "
-#else
-#define CONFIG_SYS_PROMPT "qemu-malta # "
-#endif
-
-#define CONFIG_SYS_CBSIZE 256
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS 16
-
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-
-/*
- * Serial driver
- */
-#define CONFIG_BAUDRATE 115200
-
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
-#define CONFIG_SYS_NS16550_CLK 115200
-#define CONFIG_SYS_NS16550_COM1 CKSEG1ADDR(MALTA_UART_BASE)
-#define CONFIG_CONS_INDEX 1
-
-/*
- * Environment
- */
-#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_ENV_SIZE 0x10000
-
-/*
- * Flash configuration
- */
-#define CONFIG_SYS_FLASH_BASE (KSEG1 | MALTA_FLASH_BASE)
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_MAX_FLASH_SECT 128
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
-
-/*
- * Commands
- */
-#include <config_cmd_default.h>
-
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_LOADB
-#undef CONFIG_CMD_LOADS
-#undef CONFIG_CMD_NFS
-
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PING
-
-#define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */
-
-#endif /* _QEMU_MALTA_CONFIG_H */
--
1.8.4
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