Hi Sascha,
Yes I understand your point, this time I just refer the old code.
See the old code will also use the 4K sector erase.
May be we can modify this flag once the old gets stabilized, request
for inputs..
On Sun, Sep 22, 2013 at 12:29 AM, Sascha Silbe <t-ub...@infra-silbe.de> wrote:
> Hi Jagannadha,
>
> Jagannadha Sutradharudu Teki <jagannadha.sutradharudu-t...@xilinx.com>
> writes:
>
>> SECT_4K, SECT_32K and SECT_64K opeartions are performed to
>> to specific flash by adding a SECT* flag on respective
>> spi_flash_params.flag param.
> [...]
> [drivers/mtd/spi/spi_flash_ops.c]
>> @@ -153,17 +153,13 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32
>> offset, size_t len)
>> u8 cmd[4];
>> int ret = -1;
>>
>> - erase_size = flash->sector_size;
>> + erase_size = flash->erase_size;
>> if (offset % erase_size || len % erase_size) {
>> debug("SF: Erase offset/length not multiple of erase size\n");
>> return -1;
>> }
>>
>> - if (erase_size == 4096)
>> - cmd[0] = CMD_ERASE_4K;
>> - else
>> - cmd[0] = CMD_ERASE_64K;
>> -
>> + cmd[0] = flash->erase_cmd;
> [...]
> [drivers/mtd/spi/spi_flash_probe.c]
> [...]
>> + {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64,
>> SEC_4K},
> [...]
>
> I don't quite see the point of this patch. AFAICT, at least the Winbond
> chips support _both_ sector-sized and block-sized (32KiB, 64KiB)
> erases. The latter are just a more efficient way of erasing larger
> regions. So selecting the command to use should be based on the size and
> alignment of the region that's going to be erased, not based on the size
> of the chip.
>
> In addition, a couple of typos (SEC_* instead of SECT_*) break the
> build.
>
> Sascha
>
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>
--
Thanks,
Jagan.
--------
Jagannadha Sutradharudu Teki,
E: jagannadh.t...@gmail.com, P: +91-9676773388
Engineer - System Software Hacker
U-boot - SPI Custodian and Zynq APSOC
Ln: http://www.linkedin.com/in/jaganteki
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