Hi Philippe,
On Sun, 15 Sep 2013 21:09:41 +0200, Philippe Reynes <trem...@yahoo.fr>
wrote:
>
> Signed-off-by: Philippe Reynes <trem...@yahoo.fr>
> ---
> README | 3 +
> arch/arm/cpu/armv7/mx5/clock.c | 2 +-
> arch/arm/cpu/armv7/mx6/clock.c | 2 +-
> arch/arm/imx-common/Makefile | 2 +-
> drivers/i2c/Makefile | 2 +-
> drivers/i2c/mxc_i2c.c | 109 ++++++++++++++++++---------------------
> 6 files changed, 57 insertions(+), 63 deletions(-)
>
> diff --git a/README b/README
> index 63706be..7c734ba 100644
> --- a/README
> +++ b/README
> @@ -1995,6 +1995,9 @@ CBFS (Coreboot Filesystem) support
> - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
> - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
>
> + - drivers/i2c/i2c_mxc.c
> + - activate this driver with CONFIG_SYS_I2C_MXC
> +
> additional defines:
>
> CONFIG_SYS_NUM_I2C_BUSES
> diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
> index 6bef254..fb3b128 100644
> --- a/arch/arm/cpu/armv7/mx5/clock.c
> +++ b/arch/arm/cpu/armv7/mx5/clock.c
> @@ -94,7 +94,7 @@ void enable_usboh3_clk(bool enable)
> MXC_CCM_CCGR2_USBOH3_60M(cg));
> }
>
> -#ifdef CONFIG_I2C_MXC
> +#ifdef CONFIG_SYS_I2C_MXC
> /* i2c_num can be from 0, to 1 for i.MX51 and 2 for i.MX53 */
> int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
> {
> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
> index 7efb0d2..8130827 100644
> --- a/arch/arm/cpu/armv7/mx6/clock.c
> +++ b/arch/arm/cpu/armv7/mx6/clock.c
> @@ -48,7 +48,7 @@ void enable_usboh3_clk(unsigned char enable)
>
> }
>
> -#ifdef CONFIG_I2C_MXC
> +#ifdef CONFIG_SYS_I2C_MXC
> /* i2c_num can be from 0 - 2 */
> int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
> {
> diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
> index 727a052..6c78dd9 100644
> --- a/arch/arm/imx-common/Makefile
> +++ b/arch/arm/imx-common/Makefile
> @@ -16,7 +16,7 @@ COBJS-y = iomux-v3.o
> endif
> ifeq ($(SOC),$(filter $(SOC),mx5 mx6))
> COBJS-y += timer.o cpu.o speed.o
> -COBJS-$(CONFIG_I2C_MXC) += i2c-mxv7.o
> +COBJS-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
> endif
> ifeq ($(SOC),$(filter $(SOC),mx6 mxs))
> COBJS-y += misc.o
> diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
> index 37ccbd1..f9fcebe 100644
> --- a/drivers/i2c/Makefile
> +++ b/drivers/i2c/Makefile
> @@ -14,7 +14,7 @@ COBJS-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o
> COBJS-$(CONFIG_DW_I2C) += designware_i2c.o
> COBJS-$(CONFIG_I2C_MVTWSI) += mvtwsi.o
> COBJS-$(CONFIG_I2C_MV) += mv_i2c.o
> -COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
> +COBJS-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
> COBJS-$(CONFIG_I2C_MXS) += mxs_i2c.o
> COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
> COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
> diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
> index 06ba4e3..3ac1865 100644
> --- a/drivers/i2c/mxc_i2c.c
> +++ b/drivers/i2c/mxc_i2c.c
> @@ -153,21 +153,6 @@ static int bus_i2c_set_bus_speed(void *base, int speed)
> return 0;
> }
>
> -/*
> - * Get I2C Speed
> - */
> -static unsigned int bus_i2c_get_bus_speed(void *base)
> -{
> - struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
> - u8 clk_idx = readb(&i2c_regs->ifdr);
> - u8 clk_div;
> -
> - for (clk_div = 0; i2c_clk_div[clk_div][1] != clk_idx; clk_div++)
> - ;
> -
> - return mxc_get_clock(MXC_I2C_CLK) / i2c_clk_div[clk_div][0];
> -}
> -
> #define ST_BUS_IDLE (0 | (I2SR_IBB << 8))
> #define ST_BUS_BUSY (I2SR_IBB | (I2SR_IBB << 8))
> #define ST_IIF (I2SR_IIF | (I2SR_IIF << 8))
> @@ -410,20 +395,30 @@ struct sram_data {
> */
> static struct sram_data __attribute__((section(".data"))) srdata;
>
> -void *get_base(void)
> -{
> -#ifdef CONFIG_SYS_I2C_BASE
> -#ifdef CONFIG_I2C_MULTI_BUS
> - void *ret = srdata.i2c_data[srdata.curr_i2c_bus].base;
> - if (ret)
> - return ret;
> -#endif
> - return (void *)CONFIG_SYS_I2C_BASE;
> -#elif defined(CONFIG_I2C_MULTI_BUS)
> - return srdata.i2c_data[srdata.curr_i2c_bus].base;
> +static void * const i2c_bases[] = {
> +#if defined(CONFIG_MX25)
> + (void *)IMX_I2C_BASE,
> + (void *)IMX_I2C2_BASE,
> + (void *)IMX_I2C3_BASE
> +#elif defined(CONFIG_MX27)
> + (void *)IMX_I2C1_BASE,
> + (void *)IMX_I2C2_BASE
> +#elif defined(CONFIG_MX31) || defined(CONFIG_MX35) || \
> + defined(CONFIG_MX51) || defined(CONFIG_MX53) || \
> + defined(CONFIG_MX6)
> + (void *)I2C1_BASE_ADDR,
> + (void *)I2C2_BASE_ADDR,
> + (void *)I2C3_BASE_ADDR
> +#elif defined(CONFIG_VF610)
> + (void *)I2C0_BASE_ADDR
> #else
> - return srdata.i2c_data[0].base;
> +#error "architecture not supported"
> #endif
> +};
> +
> +void *i2c_get_base(struct i2c_adapter *adap)
> +{
> + return i2c_bases[adap->hwadapnr];
> }
>
> static struct i2c_parms *i2c_get_parms(void *base)
> @@ -448,39 +443,26 @@ static int i2c_idle_bus(void *base)
> return 0;
> }
>
> -#ifdef CONFIG_I2C_MULTI_BUS
> -unsigned int i2c_get_bus_num(void)
> +int mxc_i2c_read(struct i2c_adapter *adap, uint8_t chip,
> + uint addr, int alen, uint8_t *buffer,
> + int len)
> {
> - return srdata.curr_i2c_bus;
> + return bus_i2c_read(i2c_get_base(adap), chip, addr, alen, buffer, len);
> }
>
> -int i2c_set_bus_num(unsigned bus_idx)
> -{
> - if (bus_idx >= ARRAY_SIZE(srdata.i2c_data))
> - return -1;
> - if (!srdata.i2c_data[bus_idx].base)
> - return -1;
> - srdata.curr_i2c_bus = bus_idx;
> - return 0;
> -}
> -#endif
> -
> -int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
> +int mxc_i2c_write(struct i2c_adapter *adap, uint8_t chip,
> + uint addr, int alen, uint8_t *buffer,
> + int len)
> {
> - return bus_i2c_read(get_base(), chip, addr, alen, buf, len);
> -}
> -
> -int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
> -{
> - return bus_i2c_write(get_base(), chip, addr, alen, buf, len);
> + return bus_i2c_write(i2c_get_base(adap), chip, addr, alen, buffer, len);
> }
>
> /*
> * Test if a chip at a given address responds (probe the chip)
> */
> -int i2c_probe(uchar chip)
> +int mxc_i2c_probe(struct i2c_adapter *adap, uint8_t chip)
> {
> - return bus_i2c_write(get_base(), chip, 0, 0, NULL, 0);
> + return bus_i2c_write(i2c_get_base(adap), chip, 0, 0, NULL, 0);
> }
>
> void bus_i2c_init(void *base, int speed, int unused,
> @@ -510,23 +492,32 @@ void bus_i2c_init(void *base, int speed, int unused,
> /*
> * Init I2C Bus
> */
> -void i2c_init(int speed, int unused)
> +void mxc_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
> {
> - bus_i2c_init(get_base(), speed, unused, NULL, NULL);
> + bus_i2c_init(i2c_get_base(adap), speed, slaveaddr, NULL, NULL);
> }
>
> /*
> * Set I2C Speed
> */
> -int i2c_set_bus_speed(unsigned int speed)
> +uint mxc_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed)
> {
> - return bus_i2c_set_bus_speed(get_base(), speed);
> + return bus_i2c_set_bus_speed(i2c_get_base(adap), speed);
> }
>
> /*
> - * Get I2C Speed
> + * Register mxc i2c adapters
> */
> -unsigned int i2c_get_bus_speed(void)
> -{
> - return bus_i2c_get_bus_speed(get_base());
> -}
> +U_BOOT_I2C_ADAP_COMPLETE(mxc0, mxc_i2c_init, mxc_i2c_probe,
> + mxc_i2c_read, mxc_i2c_write,
> + mxc_i2c_set_bus_speed, 100000, 0, 0)
> +U_BOOT_I2C_ADAP_COMPLETE(mxc1, mxc_i2c_init, mxc_i2c_probe,
> + mxc_i2c_read, mxc_i2c_write,
> + mxc_i2c_set_bus_speed, 100000, 0, 1)
> +#if defined(CONFIG_MX31) || defined(CONFIG_MX35) ||\
> + defined(CONFIG_MX51) || defined(CONFIG_MX53) ||\
> + defined(CONFIG_MX6)
> +U_BOOT_I2C_ADAP_COMPLETE(mxc2, mxc_i2c_init, mxc_i2c_probe,
> + mxc_i2c_read, mxc_i2c_write,
> + mxc_i2c_set_bus_speed, 100000, 0, 2)
> +#endif
Patch subject seems to imply that the whole of I2C moves to some new
subsystem. If I understand, only mxc moves. I guess "mxc" should appear
somewhere in the patch subject.
Amicalement,
--
Albert.
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