Hi Kuo-Jung, On Mon, 17 Jun 2013 20:07:02 +0800, Kuo-Jung Su <dant...@gmail.com> wrote:
> From: Kuo-Jung Su <dant...@faraday-tech.com> > > At the time of writting, none of Faraday NAND & SPI controllers > supports XIP (eXecute In Place). So the Faraday A360/A369 SoC has > to implement a 1st level bootstrap code stored in the embedded ROM > inside the SoC. > > After power-on, the ROM code (1st level bootstrap code) would load > the 2nd bootstrap code into SRAM without any SDRAM initialization. > > The 2nd bootstrap code would then initialize SDRAM and load the > generic firmware (u-boot/linux) into SDRAM, and finally make > a long-jump to the firmware. > > Which means the SPL design of U-boot would never fit to A360/A369, > since it's usually not possible to alter a embedded ROM code. > And because both the 1st & 2nd level bootstrap code use the private > Faraday Firmware Image Format, it would be better to drop U-boot > image support to simplify the design. Please reword the last sentence: you're not suggesting "to drop U-boot support" from U-Boot, right? You're only suggesting adding the Faraday image format. Also, maybe the long explanation should go in the cover letter and a single shorter paragraph should be given as commit message here. > Signed-off-by: Kuo-Jung Su <dant...@faraday-tech.com> > CC: Albert Aribaud <albert.u.b...@aribaud.net> > --- Amicalement, -- Albert. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
