>>>>> "Tom" == Tom Rini <tr...@ti.com> writes:
Tom> From: Steve Kipisz <s-kipi...@ti.com>
Tom> This patch adds support for the NOR module that attaches
Tom> to the memory cape for a Beaglebone board. This does not
Tom> add booting support; only support so that you can boot from
Tom> SD/MMC and see the NOR module so that it can be programmed.
Tom> Signed-off-by: Steve Kipisz <s-kipi...@ti.com>
Tom> [trini: Clean up config changes slightly]
Tom> Signed-off-by: Tom Rini <tr...@ti.com>
Tom> ---
Tom> Changes in v2:
Tom> - Move GPMC config portion into board.c
Tom> Signed-off-by: Tom Rini <tr...@ti.com>
Tom> ---
Tom> arch/arm/cpu/armv7/am33xx/mem.c | 6 ++++
Tom> arch/arm/include/asm/arch-am33xx/mem.h | 9 ++++++
Tom> board/ti/am335x/board.c | 13 ++++++++
Tom> board/ti/am335x/mux.c | 53
++++++++++++++++++++++++++++++++
Tom> boards.cfg | 1 +
Tom> include/configs/am335x_evm.h | 28 +++++++++++++++++
Tom> 6 files changed, 110 insertions(+)
Tom> diff --git a/arch/arm/cpu/armv7/am33xx/mem.c
b/arch/arm/cpu/armv7/am33xx/mem.c
Tom> index 45f5426..923ea83 100644
Tom> --- a/arch/arm/cpu/armv7/am33xx/mem.c
Tom> +++ b/arch/arm/cpu/armv7/am33xx/mem.c
Tom> @@ -77,9 +77,15 @@ void gpmc_init(void)
Tom> /* global settings */
Tom> writel(0x00000008, &gpmc_cfg->sysconfig);
Tom> +#ifdef CONFIG_NOR
Tom> + writel(0x00000000, &gpmc_cfg->irqstatus);
Tom> + writel(0x00000000, &gpmc_cfg->irqenable);
Tom> + writel(0x00000A00, &gpmc_cfg->config);
Tom> +#else
Tom> writel(0x00000100, &gpmc_cfg->irqstatus);
Tom> writel(0x00000100, &gpmc_cfg->irqenable);
Tom> writel(0x00000012, &gpmc_cfg->config);
Tom> +#endif
This looks to me as an indication that irqstatus/irqenable/config should
really be arguments of gpmc_init().
Tom> /*
Tom> * Disable the GPMC0 config set by ROM code
Tom> */
Tom> diff --git a/arch/arm/include/asm/arch-am33xx/mem.h
b/arch/arm/include/asm/arch-am33xx/mem.h
Tom> index c3bf74e..ddcad62 100644
Tom> --- a/arch/arm/include/asm/arch-am33xx/mem.h
Tom> +++ b/arch/arm/include/asm/arch-am33xx/mem.h
Tom> @@ -61,6 +61,15 @@
Tom> #define M_NAND_GPMC_CONFIG6 0x16000f80
Tom> #define M_NAND_GPMC_CONFIG7 0x00000008
Tom> +/* NOR chip on NOR module for Beaglebone */
Tom> +#define STNOR_GPMC_CONFIG1 0x00001200
Tom> +#define STNOR_GPMC_CONFIG2 0x00101000
Tom> +#define STNOR_GPMC_CONFIG3 0x00030301
Tom> +#define STNOR_GPMC_CONFIG4 0x10041004
Tom> +#define STNOR_GPMC_CONFIG5 0x000C1010
Tom> +#define STNOR_GPMC_CONFIG6 0x08070280
Tom> +#define STNOR_GPMC_CONFIG7 0x00000F48
Why are these not in board/ti/am335x/board.{c,h} if they are beaglebone
specific?
Tom> +
Tom> /* max number of GPMC Chip Selects */
Tom> #define GPMC_MAX_CS 8
Tom> /* max number of GPMC regs */
Tom> diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
Tom> index 0ee2f7e..3660655 100644
Tom> --- a/board/ti/am335x/board.c
Tom> +++ b/board/ti/am335x/board.c
Tom> @@ -27,6 +27,7 @@
Tom> #include <asm/arch/gpio.h>
Tom> #include <asm/arch/mmc_host_def.h>
Tom> #include <asm/arch/sys_proto.h>
Tom> +#include <asm/arch/mem.h>
Tom> #include <asm/io.h>
Tom> #include <asm/emif.h>
Tom> #include <asm/gpio.h>
Tom> @@ -366,10 +367,22 @@ void s_init(void)
Tom> */
Tom> int board_init(void)
Tom> {
Tom> +#ifdef CONFIG_NOR
Tom> + const u32 gpmc_nor[GPMC_MAX_REG] = { STNOR_GPMC_CONFIG1,
Tom> + STNOR_GPMC_CONFIG2, STNOR_GPMC_CONFIG3, STNOR_GPMC_CONFIG4,
Tom> + STNOR_GPMC_CONFIG5, STNOR_GPMC_CONFIG6, STNOR_GPMC_CONFIG7 };
Tom> +#endif
Tom> +gd-> bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
Tom> gpmc_init();
Tom> +#ifdef CONFIG_NOR
Tom> + /* Reconfigure CS0 for NOR instead of NAND. */
Tom> + enable_gpmc_cs_config(gpmc_nor, &gpmc_cfg->cs[0],
Tom> + CONFIG_SYS_FLASH_BASE, GPMC_SIZE_16M);
Tom> +#endif
Tom> +
Perhaps the nand handling should just get moved out of gpmc_init() (or
the _cs_config args should be passed to gpmc_init() ).
Tom> return 0;
Tom> }
--
Bye, Peter Korsgaard
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