[U-Boot] [PATCH] mx6: fsl_esdhc: Fix waiting for DMA operation completion

[Andrew Gabbasov]

On iMX6 sometimes the Transfer Complete interrupt occurs earlier
than the DMA part completes its operation. If immediately after that
the read data is used for some data verification, those obtained data
may be incomplete, which causes intermittent verification failures.

For example, when the default environment command tries to load and run
boot script from FAT partition on SD/MMC card, it sometimes fails,
reporting invalid partition table, or unknown partition type, or
something else of that kind. Such errors disappear if the build
configuration has CONFIG_SYS_FSL_ESDHC_USE_PIO, or if some delay
is added after transfer completion.

Adding extra waiting for DMA completion after Transfer Complete
event fixes this issue.

Signed-off-by: Andrew Gabbasov <andrew_gabba...@mentor.com>
---
 drivers/mmc/fsl_esdhc.c |    6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index d2a505e..806c6dd 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -402,6 +402,12 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, 
struct mmc_data *data)
                                return COMM_ERR;
                } while (!(irqstat & IRQSTAT_TC) &&
                                (esdhc_read32(&regs->prsstat) & PRSSTAT_DLA));
+#ifdef CONFIG_MX6
+               /* In imx6 TC (data end) interrupt sometimes occur earlier
+                  than DMA completes. In this case just wait a little more. */ 
+               while (!(irqstat & (IRQSTAT_DINT | IRQSTAT_DMAE)))
+                       irqstat = esdhc_read32(&regs->irqstat);
+#endif
 #endif
        }
 
-- 
1.7.10.4

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