On Fri, Jan 23, 2009 at 4:38 PM, Jean-Christophe PLAGNIOL-VILLARD
<plagn...@jcrosoft.com> wrote:
> On 12:56 Fri 23 Jan , Gunnar Rangoy wrote:
>> From: Olav Morken <olav...@gmail.com>
>>
>> For 100mbps operation, the ethernet controller requires a 25 MHz clock
>> in MII mode, and a 50 MHz clock in RMII mode. If the clock is slower,
>> disable 100 Mbps mode.
>>
>> Signed-off-by: Gunnar Rangoy <gun...@rangoy.com>
>> Signed-off-by: Paul Driveklepp <pauldrivekl...@gmail.com>
>> Signed-off-by: Olav Morken <olav...@gmail.com>
>> ---
>> drivers/net/macb.c | 12 +++++++++++-
>> 1 files changed, 11 insertions(+), 1 deletions(-)
>>
>> diff --git a/drivers/net/macb.c b/drivers/net/macb.c
>> index 08bebf7..d47a052 100644
>> --- a/drivers/net/macb.c
>> +++ b/drivers/net/macb.c
>> @@ -297,7 +297,17 @@ static void macb_phy_reset(struct macb_device *macb)
>> int i;
>> u16 status, adv;
>>
>> - adv = ADVERTISE_CSMA | ADVERTISE_ALL;
>> + adv = ADVERTISE_CSMA | ADVERTISE_ALL ;
> ??
Oops... Will fix this.
>> +
>> +#ifdef CONFIG_MACB_FORCE10M
>> + printf("%s: 100Mbps is not supported on this board - forcing
>> 10Mbps.\n",
>> + netdev->name);
>> +
>> + adv &= ~ADVERTISE_100FULL;
>> + adv &= ~ADVERTISE_100HALF;
>> + adv &= ~ADVERTISE_100BASE4;
>> +#endif
> not a fan
> could you be more specific about the problem?
>
> Best Regards,
> J.
>
On the EVK1100 board, the CPU (UC3A0512) is connected to the PHY via an
RMII bus. This requires the CPU clock to be at least 50 MHz.
Unfortunately, the chip on current EVK1100 boards may be unable to run
at more than 50 MHz, and with the oscillator on the board, the closest
frequency we can generate is 48 MHz.
This patch makes it possible to limit the macb to 10 MBit for this
case. We are open for suggestions for other solutions.
--
Gunnar Rangøy,
99360699
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