On Sat, Nov 10, 2018 at 03:45:41PM +0000, Ben Pye wrote:
> On Sat, Nov 10, 2018 at 06:30:37AM +0000, Ben Pye wrote:
> > On Wed, Nov 07, 2018 at 05:33:13PM +0100, Mark Kettenis wrote:
> > > > From: Ben Pye <[email protected]>
> > > > Content-Type: text/plain; charset="utf-8"
> > > > 
> > > > I have been attempting to run OpenBSD on my HP Chromebook 13, it's a
> > > > Skylake device with eMMC storage. Previously sdhc attempted to set the
> > > > same bus voltage multiple times, and after the first, successful,
> > > > attempt it would break resulting in all later commands timing out. This
> > > > patch changes sdhc such that it only sets the voltage if the request is
> > > > for a different level, this is the behaviour FreeBSD has.
> > > 
> > > That makes sense.  We'll need to test this on more hardware.  And
> > > maybe we need to reset hp->vdd in some places (suspend/resume, resets).
> > 
> > As you suspected suspend/resume isn't working with this current patch. At
> > least for my hardware I need to restore the bus_power setting on resume
> > in addition to the other registers. This seems to get the eMMC device
> > back up.
> 
> I have included the new patch to get the device attached after suspend
> below. I believe if you are not using softraid over this device then
> this should be sufficient to get working suspend/resume. Unfortunately
> softraid does not handle the detach and reattach of sd0, though I am now
> convinced that it's really a seperate issue.
> 
> Ben.
> 

As per my recent email to this list, I think that setting the bus power
back after resume is probably the wrong approach to take. For this
reason I'd suggest we don't keep the save_vdd value and call to
sdhc_bus_power after resume. This will have to be handled differently, I
have edited the patch below to reflect this.

Ben

> Index: dev/sdmmc/sdhc.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/sdmmc/sdhc.c,v
> retrieving revision 1.61
> diff -u -p -r1.61 sdhc.c
> --- dev/sdmmc/sdhc.c  6 Sep 2018 10:15:17 -0000       1.61
> +++ dev/sdmmc/sdhc.c  10 Nov 2018 15:40:40 -0000
> @@ -53,6 +53,7 @@ struct sdhc_host {
>       u_int8_t regs[14];              /* host controller state */
>       u_int16_t intr_status;          /* soft interrupt status */
>       u_int16_t intr_error_status;    /* soft error status */
> +     u_int8_t vdd;                   /* current vdd */
>  
>       bus_dmamap_t adma_map;
>       bus_dma_segment_t adma_segs[1];
> @@ -420,6 +421,8 @@ sdhc_host_reset(sdmmc_chipset_handle_t s
>  
>       s = splsdmmc();
>  
> +     hp->vdd = 0;
> +
>       /* Disable all interrupts. */
>       HWRITE2(hp, SDHC_NINTR_SIGNAL_EN, 0);
>  
> @@ -491,6 +494,16 @@ sdhc_bus_power(sdmmc_chipset_handle_t sc
>       struct sdhc_host *hp = sch;
>       u_int8_t vdd;
>       int s;
> +
> +     /*
> +      * If the requested vdd is the same as current vdd return.
> +      */
> +     if (hp->vdd == ocr)
> +             return 0;
> +
> +     hp->vdd = ocr;
>  
>       s = splsdmmc();
> 

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