> From: Ben Pye <[email protected]>
> Content-Type: text/plain; charset="utf-8"
>
> I have been attempting to run OpenBSD on my HP Chromebook 13, it's a
> Skylake device with eMMC storage. Previously sdhc attempted to set the
> same bus voltage multiple times, and after the first, successful,
> attempt it would break resulting in all later commands timing out. This
> patch changes sdhc such that it only sets the voltage if the request is
> for a different level, this is the behaviour FreeBSD has.
That makes sense. We'll need to test this on more hardware. And
maybe we need to reset hp->vdd in some places (suspend/resume, resets).
Cheers,
Mark
> Index: sys/dev/sdmmc/sdhc.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/sdmmc/sdhc.c,v
> retrieving revision 1.61
> diff -u -p -u -p -r1.61 sdhc.c
> --- sys/dev/sdmmc/sdhc.c 6 Sep 2018 10:15:17 -0000 1.61
> +++ sys/dev/sdmmc/sdhc.c 7 Nov 2018 15:36:10 -0000
> @@ -53,6 +53,7 @@ struct sdhc_host {
> u_int8_t regs[14]; /* host controller state */
> u_int16_t intr_status; /* soft interrupt status */
> u_int16_t intr_error_status; /* soft error status */
> + u_int8_t vdd; /* current vdd */
>
> bus_dmamap_t adma_map;
> bus_dma_segment_t adma_segs[1];
> @@ -420,6 +421,8 @@ sdhc_host_reset(sdmmc_chipset_handle_t s
>
> s = splsdmmc();
>
> + hp->vdd = 0;
> +
> /* Disable all interrupts. */
> HWRITE2(hp, SDHC_NINTR_SIGNAL_EN, 0);
>
> @@ -491,6 +494,16 @@ sdhc_bus_power(sdmmc_chipset_handle_t sc
> int s;
>
> s = splsdmmc();
> +
> + /*
> + * If the requested vdd is the same as current vdd return.
> + */
> + if (hp->vdd == ocr) {
> + splx(s);
> + return 0;
> + }
> +
> + hp->vdd = ocr;
>
> /*
> * Disable bus power before voltage change.
>
>
