According to the "Intel 64 and IA-32 Architectures Software
Developer's Manual", CPUID.80000001H:EDX.Page1GB [bit 26] indicates
whether 1-GByte pages are supported with IA-32e paging.
I think the diff below adds support for identifying this feature in
dmesg, but my X201s is seemingly to old to support it.
ok?
Index: amd64/include/specialreg.h
===================================================================
RCS file: /home/matthew/anoncvs/cvs/src/sys/arch/amd64/include/specialreg.h,v
retrieving revision 1.27
diff -w -u -p -r1.27 specialreg.h
--- amd64/include/specialreg.h 24 Aug 2013 04:26:16 -0000 1.27
+++ amd64/include/specialreg.h 3 Jul 2014 05:17:18 -0000
@@ -207,6 +207,7 @@
#define CPUID_NXE 0x00100000 /* No-Execute Extension */
#define CPUID_MMXX 0x00400000 /* AMD MMX Extensions */
#define CPUID_FFXSR 0x02000000 /* fast FP/MMX save/restore */
+#define CPUID_PAGE1GB 0x04000000 /* 1-GByte pages */
#define CPUID_LONG 0x20000000 /* long mode */
#define CPUID_3DNOW2 0x40000000 /* 3DNow! Instruction Extension
*/
#define CPUID_3DNOW 0x80000000 /* 3DNow! Instructions */
Index: amd64/amd64/identcpu.c
===================================================================
RCS file: /home/matthew/anoncvs/cvs/src/sys/arch/amd64/amd64/identcpu.c,v
retrieving revision 1.52
diff -w -u -p -r1.52 identcpu.c
--- amd64/amd64/identcpu.c 19 Nov 2013 04:12:17 -0000 1.52
+++ amd64/amd64/identcpu.c 3 Jul 2014 05:19:54 -0000
@@ -96,6 +96,7 @@ const struct {
{ CPUID_NXE, "NXE" },
{ CPUID_MMXX, "MMXX" },
{ CPUID_FFXSR, "FFXSR" },
+ { CPUID_PAGE1GB, "PAGE1GB" },
{ CPUID_LONG, "LONG" },
{ CPUID_3DNOW2, "3DNOW2" },
{ CPUID_3DNOW, "3DNOW" }
Index: i386/include/specialreg.h
===================================================================
RCS file: /home/matthew/anoncvs/cvs/src/sys/arch/i386/include/specialreg.h,v
retrieving revision 1.46
diff -w -u -p -r1.46 specialreg.h
--- i386/include/specialreg.h 24 Aug 2013 04:26:16 -0000 1.46
+++ i386/include/specialreg.h 3 Jul 2014 05:20:23 -0000
@@ -206,6 +206,7 @@
#define CPUID_NXE 0x00100000 /* No-Execute Extension */
#define CPUID_MMXX 0x00400000 /* AMD MMX Extensions */
#define CPUID_FFXSR 0x02000000 /* fast FP/MMX save/restore */
+#define CPUID_PAGE1GB 0x04000000 /* 1-GByte pages */
#define CPUID_LONG 0x20000000 /* long mode */
#define CPUID_3DNOW2 0x40000000 /* 3DNow! Instruction Extension
*/
#define CPUID_3DNOW 0x80000000 /* 3DNow! Instructions */
Index: i386/i386/machdep.c
===================================================================
RCS file: /home/matthew/anoncvs/cvs/src/sys/arch/i386/i386/machdep.c,v
retrieving revision 1.539
diff -w -u -p -r1.539 machdep.c
--- i386/i386/machdep.c 15 Jun 2014 11:43:24 -0000 1.539
+++ i386/i386/machdep.c 3 Jul 2014 05:20:56 -0000
@@ -1001,6 +1001,7 @@ const struct cpu_cpuid_feature i386_ecpu
{ CPUID_NXE, "NXE" },
{ CPUID_MMXX, "MMXX" },
{ CPUID_FFXSR, "FFXSR" },
+ { CPUID_PAGE1GB, "PAGE1GB" },
{ CPUID_LONG, "LONG" },
{ CPUID_3DNOW2, "3DNOW2" },
{ CPUID_3DNOW, "3DNOW" }
