Author: adrian
Date: Mon Mar 2 01:53:47 2015
New Revision: 279510
URL: https://svnweb.freebsd.org/changeset/base/279510
Log:
Add initial QCA955x support to if_arge.c.
Tested:
* AP135 development board, QCA9558 SoC.
Modified:
head/sys/mips/atheros/if_arge.c
Modified: head/sys/mips/atheros/if_arge.c
==============================================================================
--- head/sys/mips/atheros/if_arge.c Mon Mar 2 01:23:59 2015
(r279509)
+++ head/sys/mips/atheros/if_arge.c Mon Mar 2 01:53:47 2015
(r279510)
@@ -92,6 +92,7 @@ MODULE_VERSION(arge, 1);
#include <mips/atheros/ar71xxreg.h>
#include <mips/atheros/ar934xreg.h> /* XXX tsk! */
+#include <mips/atheros/qca955xreg.h> /* XXX tsk! */
#include <mips/atheros/if_argevar.h>
#include <mips/atheros/ar71xx_setup.h>
#include <mips/atheros/ar71xx_cpudef.h>
@@ -111,7 +112,8 @@ static const char * arge_miicfg_str[] =
"GMII",
"MII",
"RGMII",
- "RMII"
+ "RMII",
+ "SGMII"
};
#ifdef ARGE_DEBUG
@@ -319,6 +321,7 @@ arge_reset_mac(struct arge_softc *sc)
/*
* AR934x (and later) also needs the MDIO block reset.
+ * XXX should methodize this!
*/
if (ar71xx_soc == AR71XX_SOC_AR9341 ||
ar71xx_soc == AR71XX_SOC_AR9342 ||
@@ -329,6 +332,15 @@ arge_reset_mac(struct arge_softc *sc)
reset_reg |= AR934X_RESET_GE1_MDIO;
}
}
+
+ if (ar71xx_soc == AR71XX_SOC_QCA9556 ||
+ ar71xx_soc == AR71XX_SOC_QCA9558) {
+ if (sc->arge_mac_unit == 0) {
+ reset_reg |= QCA955X_RESET_GE0_MDIO;
+ } else {
+ reset_reg |= QCA955X_RESET_GE1_MDIO;
+ }
+ }
ar71xx_device_stop(reset_reg);
DELAY(100);
ar71xx_device_start(reset_reg);
@@ -400,6 +412,8 @@ arge_mdio_get_divider(struct arge_softc
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
+ case AR71XX_SOC_QCA9556:
+ case AR71XX_SOC_QCA9558:
table = ar933x_mdio_div_table;
ndivs = nitems(ar933x_mdio_div_table);
break;
@@ -489,6 +503,8 @@ arge_fetch_mdiobus_clock_rate(struct arg
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
+ case AR71XX_SOC_QCA9556:
+ case AR71XX_SOC_QCA9558:
return (MAC_MII_CFG_CLOCK_DIV_58);
break;
default:
@@ -793,6 +809,8 @@ arge_attach(device_t dev)
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
+ case AR71XX_SOC_QCA9556:
+ case AR71XX_SOC_QCA9558:
ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG1, 0x0010ffff);
ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG2, 0x015500aa);
break;
@@ -1126,6 +1144,8 @@ arge_set_pll(struct arge_softc *sc, int
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
+ case AR71XX_SOC_QCA9556:
+ case AR71XX_SOC_QCA9558:
fifo_tx = 0x01f00140;
break;
case AR71XX_SOC_AR9130:
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