Author: adrian
Date: Mon Mar  2 01:23:59 2015
New Revision: 279509
URL: https://svnweb.freebsd.org/changeset/base/279509

Log:
  Add a MII mode for SGMII.
  
  This appears on the AR934x and later chips, although it's not
  something that's programmed via the arge0/arge1 register space.
  It's just cosmetic.

Modified:
  head/sys/mips/atheros/ar71xxreg.h

Modified: head/sys/mips/atheros/ar71xxreg.h
==============================================================================
--- head/sys/mips/atheros/ar71xxreg.h   Sun Mar  1 22:32:23 2015        
(r279508)
+++ head/sys/mips/atheros/ar71xxreg.h   Mon Mar  2 01:23:59 2015        
(r279509)
@@ -273,6 +273,7 @@ typedef enum {
        AR71XX_MII_MODE_MII,
        AR71XX_MII_MODE_RGMII,
        AR71XX_MII_MODE_RMII,
+       AR71XX_MII_MODE_SGMII   /* not hardware defined, though! */
 } ar71xx_mii_mode;
 
 /*
_______________________________________________
svn-src-head@freebsd.org mailing list
http://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

Reply via email to