Module Name: src Committed By: skrll Date: Thu Oct 15 07:13:50 UTC 2015
Modified Files: src/sys/arch/arm/arm: cpufunc.c src/sys/arch/arm/cortex: a9_mpsubr.S src/sys/arch/arm/include: armreg.h src/sys/arch/evbarm/conf: std.tegra Log Message: Setting actlr.bit15=1 (Force in order issue in the branch execution unit) makes my jetson tk1 stable. Apply this workaround until we figure out what the real problem is. To generate a diff of this commit: cvs rdiff -u -r1.156 -r1.157 src/sys/arch/arm/arm/cpufunc.c cvs rdiff -u -r1.42 -r1.43 src/sys/arch/arm/cortex/a9_mpsubr.S cvs rdiff -u -r1.107 -r1.108 src/sys/arch/arm/include/armreg.h cvs rdiff -u -r1.7 -r1.8 src/sys/arch/evbarm/conf/std.tegra Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.