Module Name: src
Committed By: dholland
Date: Sun May 23 23:22:55 UTC 2021
Modified Files:
src/sys/arch/mips/mips: db_disasm.c db_interface.c
src/sys/arch/riscv/riscv: db_disasm.c db_machdep.c
Log Message:
Improve ddb disassembly for mips (and riscv, cribbed from mips).
- use db_read_bytes to get instructions
- move the address check logic previously attached only to fetching
instructions for disassembly to db_read_bytes (and db_write_bytes)
Motivated by related x86 changes this afternoon.
Note that the address check logic is not as sophisticated as what the
x86 code does, but it's what we had before. (Except that riscv will
now also try to fetch usermode instructions instead of just failing.)
To generate a diff of this commit:
cvs rdiff -u -r1.42 -r1.43 src/sys/arch/mips/mips/db_disasm.c
cvs rdiff -u -r1.93 -r1.94 src/sys/arch/mips/mips/db_interface.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/riscv/riscv/db_disasm.c \
src/sys/arch/riscv/riscv/db_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
