Module Name:    src
Committed By:   jmcneill
Date:           Sat Jun 25 13:24:35 UTC 2022

Modified Files:
        src/sys/arch/aarch64/aarch64: genassym.cf vectors.S
        src/sys/arch/aarch64/conf: files.aarch64
        src/sys/arch/aarch64/include: cpu.h
        src/sys/arch/arm/cortex: files.cortex gic.c gicv3.c
        src/sys/arch/arm/fdt: fdt_intr.h
        src/sys/arch/arm/gemini: gemini_intr.h
        src/sys/arch/arm/imx: imx31_intr.h imx51_intr.h
        src/sys/arch/arm/marvell: mvsoc_intr.h
        src/sys/arch/arm/omap: omap2_intr.h
        src/sys/arch/arm/pic: pic_splfuncs.c picvar.h
        src/sys/arch/evbarm/conf: std.generic64

Log Message:
Remove GIC_SPLFUNCS.


To generate a diff of this commit:
cvs rdiff -u -r1.37 -r1.38 src/sys/arch/aarch64/aarch64/genassym.cf
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/aarch64/aarch64/vectors.S
cvs rdiff -u -r1.37 -r1.38 src/sys/arch/aarch64/conf/files.aarch64
cvs rdiff -u -r1.46 -r1.47 src/sys/arch/aarch64/include/cpu.h
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/cortex/files.cortex
cvs rdiff -u -r1.54 -r1.55 src/sys/arch/arm/cortex/gic.c
cvs rdiff -u -r1.51 -r1.52 src/sys/arch/arm/cortex/gicv3.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/fdt/fdt_intr.h
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/gemini/gemini_intr.h
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/imx/imx31_intr.h
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx51_intr.h
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/marvell/mvsoc_intr.h
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/omap/omap2_intr.h
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/pic/pic_splfuncs.c
cvs rdiff -u -r1.37 -r1.38 src/sys/arch/arm/pic/picvar.h
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/evbarm/conf/std.generic64

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/aarch64/genassym.cf
diff -u src/sys/arch/aarch64/aarch64/genassym.cf:1.37 src/sys/arch/aarch64/aarch64/genassym.cf:1.38
--- src/sys/arch/aarch64/aarch64/genassym.cf:1.37	Sat Oct 30 20:23:11 2021
+++ src/sys/arch/aarch64/aarch64/genassym.cf	Sat Jun 25 13:24:34 2022
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.37 2021/10/30 20:23:11 jmcneill Exp $
+# $NetBSD: genassym.cf,v 1.38 2022/06/25 13:24:34 jmcneill Exp $
 #-
 # Copyright (c) 2014 The NetBSD Foundation, Inc.
 # All rights reserved.
@@ -298,9 +298,6 @@ define	CI_MTX_COUNT		offsetof(struct cpu
 define	CI_SOFTINTS		offsetof(struct cpu_info, ci_softints)
 define	CI_IDLELWP		offsetof(struct cpu_info, ci_data.cpu_idlelwp)
 define	CI_CC_NINTR		offsetof(struct cpu_info, ci_data.cpu_nintr)
-define	CI_SPLX_RESTART		offsetof(struct cpu_info, ci_splx_restart)
-define	CI_SPLX_SAVEDIPL	offsetof(struct cpu_info, ci_splx_savedipl)
-define	CI_HWPL			offsetof(struct cpu_info, ci_hwpl)
 
 define	V_RESCHED_KPREEMPT	ilog2(RESCHED_KPREEMPT)
 

Index: src/sys/arch/aarch64/aarch64/vectors.S
diff -u src/sys/arch/aarch64/aarch64/vectors.S:1.27 src/sys/arch/aarch64/aarch64/vectors.S:1.28
--- src/sys/arch/aarch64/aarch64/vectors.S:1.27	Sun May 29 23:39:59 2022
+++ src/sys/arch/aarch64/aarch64/vectors.S	Sat Jun 25 13:24:34 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: vectors.S,v 1.27 2022/05/29 23:39:59 ryo Exp $	*/
+/*	$NetBSD: vectors.S,v 1.28 2022/06/25 13:24:34 jmcneill Exp $	*/
 
 #include <aarch64/asm.h>
 #include <aarch64/locore.h>
@@ -11,7 +11,7 @@
 #include "opt_dtrace.h"
 #include "opt_gic.h"
 
-RCSID("$NetBSD: vectors.S,v 1.27 2022/05/29 23:39:59 ryo Exp $")
+RCSID("$NetBSD: vectors.S,v 1.28 2022/06/25 13:24:34 jmcneill Exp $")
 
 	ARMV8_DEFINE_OPTIONS
 
@@ -227,23 +227,7 @@ ENTRY_NP(el1_trap_exit)
 
 	unwind_x3_x30
 
-#ifdef GIC_SPLFUNCS
-	mrs	x0, tpidr_el1		/* get curlwp */
-	ldr	x0, [x0, #L_CPU]	/* get curcpu */
-
-	/*
-	 * If ci_intr_depth == 0 and ci_splx_restart != 0, return
-	 * to splx restart. Otherwise return to exception pc.
-	 */
-	ldr	w1, [x0, #CI_INTR_DEPTH]
-	cbnz	w1, 1f
-	ldr	x0, [x0, #CI_SPLX_RESTART]
-	cbnz	x0, 2f
-1:
-	ldr	x0, [sp, #TF_PC]
-2:
-	ldr	x1, [sp, #TF_SPSR]
-#elif TF_PC + 8 == TF_SPSR
+#if TF_PC + 8 == TF_SPSR
 	ldp	x0, x1, [sp, #TF_PC]
 #else
 	ldr	x0, [sp, #TF_PC]

Index: src/sys/arch/aarch64/conf/files.aarch64
diff -u src/sys/arch/aarch64/conf/files.aarch64:1.37 src/sys/arch/aarch64/conf/files.aarch64:1.38
--- src/sys/arch/aarch64/conf/files.aarch64:1.37	Mon Jan 31 09:16:09 2022
+++ src/sys/arch/aarch64/conf/files.aarch64	Sat Jun 25 13:24:34 2022
@@ -1,4 +1,4 @@
-#	$NetBSD: files.aarch64,v 1.37 2022/01/31 09:16:09 ryo Exp $
+#	$NetBSD: files.aarch64,v 1.38 2022/06/25 13:24:34 jmcneill Exp $
 
 defflag opt_cpuoptions.h	AARCH64_ALIGNMENT_CHECK
 defflag opt_cpuoptions.h	AARCH64_EL0_STACK_ALIGNMENT_CHECK
@@ -120,9 +120,6 @@ file	arch/aarch64/aarch64/pmap_page.S
 file	uvm/pmap/pmap_tlb.c
 file	uvm/pmap/pmap_pvt.c
 
-# GIC
-file	arch/arm/cortex/gic_splfuncs_armv8.S		gic_splfuncs
-
 # EFI runtime (machdep)
 file	arch/aarch64/aarch64/efi_machdep.c		efi_runtime
 

Index: src/sys/arch/aarch64/include/cpu.h
diff -u src/sys/arch/aarch64/include/cpu.h:1.46 src/sys/arch/aarch64/include/cpu.h:1.47
--- src/sys/arch/aarch64/include/cpu.h:1.46	Sat Jun 25 12:41:56 2022
+++ src/sys/arch/aarch64/include/cpu.h	Sat Jun 25 13:24:34 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.46 2022/06/25 12:41:56 jmcneill Exp $ */
+/* $NetBSD: cpu.h,v 1.47 2022/06/25 13:24:34 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -134,8 +134,6 @@ struct cpu_info {
 	volatile uint32_t ci_blocked_pics;
 	volatile uint32_t ci_pending_pics;
 	volatile uint32_t ci_pending_ipls;
-	void *ci_splx_restart;
-	int ci_splx_savedipl;
 
 	int ci_kfpu_spl;
 

Index: src/sys/arch/arm/cortex/files.cortex
diff -u src/sys/arch/arm/cortex/files.cortex:1.16 src/sys/arch/arm/cortex/files.cortex:1.17
--- src/sys/arch/arm/cortex/files.cortex:1.16	Tue Aug 10 17:12:31 2021
+++ src/sys/arch/arm/cortex/files.cortex	Sat Jun 25 13:24:34 2022
@@ -1,4 +1,4 @@
-# $NetBSD: files.cortex,v 1.16 2021/08/10 17:12:31 jmcneill Exp $
+# $NetBSD: files.cortex,v 1.17 2022/06/25 13:24:34 jmcneill Exp $
 
 defflag opt_cpu_in_cksum.h			NEON_IN_CKSUM
 
@@ -11,9 +11,6 @@ device	armperiph: mpcorebus
 attach	armperiph at mainbus
 file	arch/arm/cortex/armperiph.c		armperiph
 
-defflag	opt_gic.h				GIC_SPLFUNCS
-file	arch/arm/cortex/gic_splfuncs.c		gic_splfuncs
-
 # ARM Generic Interrupt Controller (initially on Cortex-A9)
 device	armgic: pic, pic_splfuncs
 attach	armgic at mpcorebus

Index: src/sys/arch/arm/cortex/gic.c
diff -u src/sys/arch/arm/cortex/gic.c:1.54 src/sys/arch/arm/cortex/gic.c:1.55
--- src/sys/arch/arm/cortex/gic.c:1.54	Sat Jun 25 12:41:55 2022
+++ src/sys/arch/arm/cortex/gic.c	Sat Jun 25 13:24:34 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: gic.c,v 1.54 2022/06/25 12:41:55 jmcneill Exp $	*/
+/*	$NetBSD: gic.c,v 1.55 2022/06/25 13:24:34 jmcneill Exp $	*/
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -35,7 +35,7 @@
 #define _INTR_PRIVATE
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.54 2022/06/25 12:41:55 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.55 2022/06/25 13:24:34 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -53,10 +53,6 @@ __KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.54
 #include <arm/cortex/gic_reg.h>
 #include <arm/cortex/mpcore_var.h>
 
-#ifdef GIC_SPLFUNCS
-#include <arm/cortex/gic_splfuncs.h>
-#endif
-
 void armgic_irq_handler(void *);
 
 #define	ARMGIC_SGI_IPIBASE	0
@@ -745,10 +741,6 @@ armgic_attach(device_t parent, device_t 
 	aprint_normal_dev(sc->sc_dev, "%u Priorities, %zu SPIs, %u PPIs, "
 	    "%u SGIs\n",  priorities, sc->sc_gic_lines - ppis - sgis, ppis,
 	    sgis);
-
-#ifdef GIC_SPLFUNCS
-	gic_spl_init();
-#endif
 }
 
 CFATTACH_DECL_NEW(armgic, 0,

Index: src/sys/arch/arm/cortex/gicv3.c
diff -u src/sys/arch/arm/cortex/gicv3.c:1.51 src/sys/arch/arm/cortex/gicv3.c:1.52
--- src/sys/arch/arm/cortex/gicv3.c:1.51	Sat Jun 25 12:41:55 2022
+++ src/sys/arch/arm/cortex/gicv3.c	Sat Jun 25 13:24:34 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3.c,v 1.51 2022/06/25 12:41:55 jmcneill Exp $ */
+/* $NetBSD: gicv3.c,v 1.52 2022/06/25 13:24:34 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2018 Jared McNeill <jmcne...@invisible.ca>
@@ -32,7 +32,7 @@
 #define	_INTR_PRIVATE
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.51 2022/06/25 12:41:55 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.52 2022/06/25 13:24:34 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/kernel.h>
@@ -53,10 +53,6 @@ __KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.
 #include <arm/cortex/gicv3.h>
 #include <arm/cortex/gic_reg.h>
 
-#ifdef GIC_SPLFUNCS
-#include <arm/cortex/gic_splfuncs.h>
-#endif
-
 #define	PICTOSOFTC(pic)	\
 	container_of(pic, struct gicv3_softc, sc_pic)
 #define	LPITOSOFTC(lpi) \
@@ -951,9 +947,5 @@ gicv3_init(struct gicv3_softc *sc)
 #endif
 #endif
 
-#ifdef GIC_SPLFUNCS
-	gic_spl_init();
-#endif
-
 	return 0;
 }

Index: src/sys/arch/arm/fdt/fdt_intr.h
diff -u src/sys/arch/arm/fdt/fdt_intr.h:1.7 src/sys/arch/arm/fdt/fdt_intr.h:1.8
--- src/sys/arch/arm/fdt/fdt_intr.h:1.7	Mon Sep 20 21:05:15 2021
+++ src/sys/arch/arm/fdt/fdt_intr.h	Sat Jun 25 13:24:34 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fdt_intr.h,v 1.7 2021/09/20 21:05:15 jmcneill Exp $ */
+/* $NetBSD: fdt_intr.h,v 1.8 2022/06/25 13:24:34 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca>
@@ -40,10 +40,6 @@
 #define	PIC_MAXSOURCES		8192
 #define	PIC_MAXMAXSOURCES	(PIC_MAXSOURCES * 2 + 32)
 
-#define	_splraise	pic_splraise
-#define	_spllower	pic_spllower
-#define	splx		pic_splx
-
 void	arm_fdt_irq_set_handler(void (*)(void *));
 void	arm_fdt_irq_handler(void *);
 void	arm_fdt_fiq_set_handler(void (*)(void *));

Index: src/sys/arch/arm/gemini/gemini_intr.h
diff -u src/sys/arch/arm/gemini/gemini_intr.h:1.3 src/sys/arch/arm/gemini/gemini_intr.h:1.4
--- src/sys/arch/arm/gemini/gemini_intr.h:1.3	Thu Sep 30 07:49:09 2021
+++ src/sys/arch/arm/gemini/gemini_intr.h	Sat Jun 25 13:24:34 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: gemini_intr.h,v 1.3 2021/09/30 07:49:09 skrll Exp $	*/
+/*	$NetBSD: gemini_intr.h,v 1.4 2022/06/25 13:24:34 jmcneill Exp $	*/
 
 #ifndef _ARM_GEMINI_INTR_H_
 #define _ARM_GEMINI_INTR_H_
@@ -8,10 +8,6 @@
 #ifndef _LOCORE
 void	gemini_irq_handler(void *);
 
-#define	_splraise	pic_splraise
-#define	_spllower	pic_spllower
-#define	splx		pic_splx
-
 #include <arm/pic/picvar.h>
 #endif	/* _LOCORE */
 

Index: src/sys/arch/arm/imx/imx31_intr.h
diff -u src/sys/arch/arm/imx/imx31_intr.h:1.5 src/sys/arch/arm/imx/imx31_intr.h:1.6
--- src/sys/arch/arm/imx/imx31_intr.h:1.5	Mon Dec 27 23:04:19 2021
+++ src/sys/arch/arm/imx/imx31_intr.h	Sat Jun 25 13:24:35 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx31_intr.h,v 1.5 2021/12/27 23:04:19 andvar Exp $	*/
+/*	$NetBSD: imx31_intr.h,v 1.6 2022/06/25 13:24:35 jmcneill Exp $	*/
 /*-
  * Copyright (c) 2007 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -121,10 +121,6 @@
 
 #define	PIC_MAXMAXSOURCES	(64+3*32+128)
 
-#define	_splraise	pic_splraise
-#define	_spllower	pic_spllower
-#define	splx		pic_splx
-
 #include <arm/pic/picvar.h>
 
 const char *

Index: src/sys/arch/arm/imx/imx51_intr.h
diff -u src/sys/arch/arm/imx/imx51_intr.h:1.2 src/sys/arch/arm/imx/imx51_intr.h:1.3
--- src/sys/arch/arm/imx/imx51_intr.h:1.2	Fri Sep 24 08:07:40 2021
+++ src/sys/arch/arm/imx/imx51_intr.h	Sat Jun 25 13:24:35 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_intr.h,v 1.2 2021/09/24 08:07:40 skrll Exp $	*/
+/*	$NetBSD: imx51_intr.h,v 1.3 2022/06/25 13:24:35 jmcneill Exp $	*/
 /*-
  * Copyright (c) 2009 SHIMIZU Ryo <r...@nerv.org>
  * All rights reserved.
@@ -290,10 +290,6 @@
 #define	PIC_MAXSOURCES		128
 #define	PIC_MAXMAXSOURCES	(PIC_MAXSOURCES+128)
 
-#define	_splraise	pic_splraise
-#define	_spllower	pic_spllower
-#define	splx		pic_splx
-
 #include <arm/pic/picvar.h>
 
 const char *intr_typename(int);

Index: src/sys/arch/arm/marvell/mvsoc_intr.h
diff -u src/sys/arch/arm/marvell/mvsoc_intr.h:1.7 src/sys/arch/arm/marvell/mvsoc_intr.h:1.8
--- src/sys/arch/arm/marvell/mvsoc_intr.h:1.7	Fri Sep 24 08:07:40 2021
+++ src/sys/arch/arm/marvell/mvsoc_intr.h	Sat Jun 25 13:24:35 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: mvsoc_intr.h,v 1.7 2021/09/24 08:07:40 skrll Exp $	*/
+/*	$NetBSD: mvsoc_intr.h,v 1.8 2022/06/25 13:24:35 jmcneill Exp $	*/
 /*
  * Copyright (c) 2010 KIYOHARA Takashi
  * All rights reserved.
@@ -45,10 +45,6 @@ extern int (*find_pending_irqs)(void);
 
 void mvsoc_irq_handler(void *);
 
-#define	_splraise	pic_splraise
-#define	_spllower	pic_spllower
-#define	splx		pic_splx
-
 #include <arm/pic/picvar.h>
 
 static __inline void *

Index: src/sys/arch/arm/omap/omap2_intr.h
diff -u src/sys/arch/arm/omap/omap2_intr.h:1.10 src/sys/arch/arm/omap/omap2_intr.h:1.11
--- src/sys/arch/arm/omap/omap2_intr.h:1.10	Fri Sep 24 08:07:40 2021
+++ src/sys/arch/arm/omap/omap2_intr.h	Sat Jun 25 13:24:35 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: omap2_intr.h,v 1.10 2021/09/24 08:07:40 skrll Exp $ */
+/*	$NetBSD: omap2_intr.h,v 1.11 2022/06/25 13:24:35 jmcneill Exp $ */
 
 /*
  * Define the SDP2430 specific information and then include the generic OMAP
@@ -49,10 +49,6 @@
 
 #ifndef _LOCORE
 
-#define	_splraise	pic_splraise
-#define	_spllower	pic_spllower
-#define	splx		pic_splx
-
 #include <arm/pic/picvar.h>
 
 #endif /* ! _LOCORE */

Index: src/sys/arch/arm/pic/pic_splfuncs.c
diff -u src/sys/arch/arm/pic/pic_splfuncs.c:1.23 src/sys/arch/arm/pic/pic_splfuncs.c:1.24
--- src/sys/arch/arm/pic/pic_splfuncs.c:1.23	Sat Jun 25 12:39:46 2022
+++ src/sys/arch/arm/pic/pic_splfuncs.c	Sat Jun 25 13:24:35 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: pic_splfuncs.c,v 1.23 2022/06/25 12:39:46 jmcneill Exp $	*/
+/*	$NetBSD: pic_splfuncs.c,v 1.24 2022/06/25 13:24:35 jmcneill Exp $	*/
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -31,7 +31,7 @@
 #include "opt_modular.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.23 2022/06/25 12:39:46 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.24 2022/06/25 13:24:35 jmcneill Exp $");
 
 #define _INTR_PRIVATE
 #include <sys/param.h>
@@ -49,16 +49,8 @@ __KERNEL_RCSID(0, "$NetBSD: pic_splfuncs
 
 #include <arm/pic/picvar.h>
 
-static int	pic_default_splraise(int);
-static int	pic_default_spllower(int);
-static void	pic_default_splx(int);
-
-int (*pic_splraise)(int) = pic_default_splraise;
-int (*pic_spllower)(int) = pic_default_spllower;
-void (*pic_splx)(int) = pic_default_splx;
-
-static int
-pic_default_splraise(int newipl)
+int
+_splraise(int newipl)
 {
 	struct cpu_info * const ci = curcpu();
 	const int oldipl = ci->ci_cpl;
@@ -69,8 +61,8 @@ pic_default_splraise(int newipl)
 	return oldipl;
 }
 
-static int
-pic_default_spllower(int newipl)
+int
+_spllower(int newipl)
 {
 	struct cpu_info * const ci = curcpu();
 	const int oldipl = ci->ci_cpl;
@@ -87,8 +79,8 @@ pic_default_spllower(int newipl)
 	return oldipl;
 }
 
-static void
-pic_default_splx(int savedipl)
+void
+splx(int savedipl)
 {
 	struct cpu_info * const ci = curcpu();
 	KASSERT(savedipl < NIPL);
@@ -117,38 +109,3 @@ pic_default_splx(int savedipl)
 	KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
 	    ci->ci_cpl, savedipl);
 }
-
-#ifdef MODULAR
-#ifdef _spllower
-#undef _spllower
-#endif
-int _spllower(int);
-
-#ifdef _splraise
-#undef _splraise
-#endif
-int _splraise(int);
-
-#ifdef splx
-#undef splx
-#endif
-void splx(int);
-
-int
-_spllower(int newipl)
-{
-	return pic_spllower(newipl);
-}
-
-int
-_splraise(int newipl)
-{
-	return pic_splraise(newipl);
-}
-
-void
-splx(int savedipl)
-{
-	pic_splx(savedipl);
-}
-#endif /* !MODULAR */

Index: src/sys/arch/arm/pic/picvar.h
diff -u src/sys/arch/arm/pic/picvar.h:1.37 src/sys/arch/arm/pic/picvar.h:1.38
--- src/sys/arch/arm/pic/picvar.h:1.37	Sun Sep 26 13:38:49 2021
+++ src/sys/arch/arm/pic/picvar.h	Sat Jun 25 13:24:35 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: picvar.h,v 1.37 2021/09/26 13:38:49 jmcneill Exp $	*/
+/*	$NetBSD: picvar.h,v 1.38 2022/06/25 13:24:35 jmcneill Exp $	*/
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -40,9 +40,9 @@
 
 typedef uint32_t	intr_handle_t;		/* for ACPI */
 
-extern int	(*pic_splraise)(int);
-extern int	(*pic_spllower)(int);
-extern void	(*pic_splx)(int);
+int	_splraise(int);
+int	_spllower(int);
+void	splx(int);
 
 const char *
 	intr_typename(int);

Index: src/sys/arch/evbarm/conf/std.generic64
diff -u src/sys/arch/evbarm/conf/std.generic64:1.18 src/sys/arch/evbarm/conf/std.generic64:1.19
--- src/sys/arch/evbarm/conf/std.generic64:1.18	Sun Oct 31 12:34:48 2021
+++ src/sys/arch/evbarm/conf/std.generic64	Sat Jun 25 13:24:35 2022
@@ -1,4 +1,4 @@
-#	$NetBSD: std.generic64,v 1.18 2021/10/31 12:34:48 jmcneill Exp $
+#	$NetBSD: std.generic64,v 1.19 2022/06/25 13:24:35 jmcneill Exp $
 #
 #	generic NetBSD/evbarm64 with FDT support
 
@@ -16,7 +16,6 @@ options 	DRAM_BLOCKS=256
 options 	EVBARM_BOARDTYPE="FDT"
 options 	FDT				# Flattened Device Tree support
 options 	FPU_VFP
-#options 	GIC_SPLFUNCS			# Experimental
 options 	MODULAR
 options 	MODULAR_DEFAULT_AUTOLOAD
 options 	PCI_NETBSD_CONFIGURE

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