flight 175032 libvirt real [real]
http://logs.test-lab.xenproject.org/osstest/logs/175032/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-armhf-armhf-libvirt 16 saverestore-support-checkfail like 175018
test-armhf-armhf-libvirt-raw 15 saveresto
flight 175033 ovmf real [real]
http://logs.test-lab.xenproject.org/osstest/logs/175033/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf 7de1c71dd2f4e04bd832fc7b92c8255161705393
baseline version:
ovmf 5d5be45bd7c1e4798
flight 175030 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/175030/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-arm64-arm64-examine 8 reboot fail REGR. vs. 173462
test-arm64-arm64-xl
flight 175031 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/175031/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-xl-qemut-win7-amd64 19 guest-stopfail like 175009
test-armhf-armhf-libvirt 16 save
Hi Carlo,
Just in case you are waiting on my review before sending a new version.
Given that...
On 22/10/2022 16:51, Carlo Nonato wrote:
Shared caches in multi-core CPU architectures represent a problem for
predictability of memory access latency. This jeopardizes applicability
of many Arm pl
Hi Ayan,
Title: It suggests that this is modifying arch/arm whereas you are
updating the Arm part of the ns16550 driver.
In addition to that, from a reader PoV, it is more important to emphase
on the fact the truncation check is removed rather than the extra
assignment.
So I would suggest
On 29/11/2022 16:01, Julien Grall wrote:
Hi Jan,
On 29/11/2022 15:39, Jan Beulich wrote:
While not as inefficient as it would be on x86 (due to suitable constant
loading and register pair storing instructions being available to fill
some of the fields), having the compiler construct an array
On 29/11/2022 15:53, Julien Grall wrote:
Hi Jan,
On 29/11/2022 15:39, Jan Beulich wrote:
It is generally preferable to not hold locks around allocation
functions. And indeed in the hwdom case there's no point at all to hold
the paging lock. Reduce the locked regions to the non-hwdom case, wh
Hi,
On 28/11/2022 15:56, Ayan Kumar Halder wrote:
Refer ARM DDI 0487I.a ID081822, G8-9817, G8.2.169
Affinity level 3 is not present in AArch32.
Also, refer ARM DDI 0406C.d ID040418, B4-1644, B4.1.106,
Affinity level 3 is not present in Armv7 (ie arm32).
Thus, any access to affinity level 3 needs
Hi Ayan,
On 28/11/2022 15:56, Ayan Kumar Halder wrote:
Refer ARM DDI 0487I.a ID081822, G8-9650, G8.2.113
Aff3 does not exist on AArch32.
Also, refer ARM DDI 0406C.d ID040418, B4-1644, B4.1.106
Aff3 does not exist on Armv7 (ie arm32).
Thus, access to aff3 has been protected with "#ifdef CONFIG_A
Hi,
On 29/11/2022 14:33, Michal Orzel wrote:
@@ -417,12 +417,12 @@ static void gicv3_dump_state(const struct vcpu *v)
if ( v == current )
{
for ( i = 0; i < gicv3_info.nr_lrs; i++ )
-printk(" HW_LR[%d]=%lx\n", i, gicv3_ich_read_lr(i));
+printk("
On 03/12/2022 18:05, Julien Grall wrote:
Hi Ayan,
Hi Julien,
Title: It suggests that this is modifying arch/arm whereas you are
updating the Arm part of the ns16550 driver.
In addition to that, from a reader PoV, it is more important to
emphase on the fact the truncation check is remov
Hi Ayan,
On 03/12/2022 19:08, Ayan Kumar Halder wrote:
On 03/12/2022 18:05, Julien Grall wrote:
Hi Ayan,
Hi Julien,
Title: It suggests that this is modifying arch/arm whereas you are
updating the Arm part of the ns16550 driver.
In addition to that, from a reader PoV, it is more importa
flight 175034 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/175034/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-arm64-arm64-examine 8 reboot fail REGR. vs. 173462
test-arm64-arm64-xl
On 03/12/2022 18:35, Julien Grall wrote:
Hi,
Hi Julien,
On 29/11/2022 14:33, Michal Orzel wrote:
@@ -417,12 +417,12 @@ static void gicv3_dump_state(const struct vcpu
*v)
if ( v == current )
{
for ( i = 0; i < gicv3_info.nr_lrs; i++ )
- printk(" HW_LR[%d
Hi Bobby,
On 20/11/2022 17:01, Bobby Eshleman wrote:
On Fri, Dec 02, 2022 at 12:56:06PM +, Andrew Cooper wrote:
On 02/12/2022 12:35, Ayan Kumar Halder wrote:
Currently this change will not have any impact on the existing architectures.
The following table illustrates PADDR_BITS vs BITS_PER
Hi,
On 28/11/2022 15:56, Ayan Kumar Halder wrote:
On AArch32, ldrd/strd instructions are not atomic when used to access MMIO.
Furthermore, ldrd/strd instructions are not decoded by Arm when running as
a guest to access emulated MMIO region.
Thus, we have defined readq_relaxed_non_atomic()/writeq
Hi,
On 28/11/2022 15:56, Ayan Kumar Halder wrote:
One can now use GICv3 on AArch32 systems. However, ITS is not supported.
The reason being currently we are trying to validate GICv3 on an AArch32_v8R
system. Refer ARM DDI 0568A.c ID110520, B1.3.1,
"A Generic Interrupt Controller (GIC) implemente
Hi,
On 03/12/2022 20:02, Ayan Kumar Halder wrote:
The definition is different :-
In xen/arch/arm/include/asm/arm32/sysregs.h
"#define __CP32(r, coproc, opc1, crn, crm, opc2) coproc, opc1, r, crn,
crm, opc2" (Note:- it takes 6 arguments)
And what I have defined in xen/arch/arm/include/a
Hi Rahul,
I have only skimmed through the patch so far.
On 01/12/2022 16:02, Rahul Singh wrote:
static int vsmmuv3_mmio_write(struct vcpu *v, mmio_info_t *info,
register_t r, void *priv)
{
+struct virt_smmu *smmu = priv;
+uint64_t reg;
+uint32_t r
flight 175035 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/175035/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 15 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm 1
Hi,
On 01/12/2022 16:02, Rahul Singh wrote:
Add support for virtual cmdqueue handling for guests
This commit message is a bit light given the security implication of
this approach. See some of the questions below.
[...]
+static int arm_vsmmu_handle_cmds(struct virt_smmu *smmu)
+{
+str
Hi Rahul,
On 01/12/2022 16:02, Rahul Singh wrote:
This patch adds basic framework for vIOMMU.
Signed-off-by: Rahul Singh
---
xen/arch/arm/domain.c| 17 +++
xen/arch/arm/domain_build.c | 3 ++
xen/arch/arm/include/asm/viommu.h| 70 ++
Hi Rahul,
On 01/12/2022 16:02, Rahul Singh wrote:
This patch series is sent as RFC to get the initial feedback from the
community. This patch series consists of 21 patches which is a big number for
the reviewer to review the patches but to understand the feature end-to-end we
thought of sending
flight 175036 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/175036/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-arm64-arm64-examine 8 reboot fail REGR. vs. 173462
test-arm64-arm64-xl
flight 175037 xen-unstable real [real]
flight 175039 xen-unstable real-retest [real]
http://logs.test-lab.xenproject.org/osstest/logs/175037/
http://logs.test-lab.xenproject.org/osstest/logs/175039/
Failures :-/ but no regressions.
Tests which are failing intermittently (not blocking):
test-amd6
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