Hi Bobby,
On 20/11/2022 17:01, Bobby Eshleman wrote:
On Fri, Dec 02, 2022 at 12:56:06PM +0000, Andrew Cooper wrote:
On 02/12/2022 12:35, Ayan Kumar Halder wrote:
Currently this change will not have any impact on the existing architectures.
The following table illustrates PADDR_BITS vs BITS_PER_LONG of different archs
------------------------------------------------
| Arch | PADDR_BITS | BITS_PER_LONG |
------------------------------------------------
| Arm_64 | 48 | 64 |
| Arm_32 | 40 | 32 |
| RISCV_64 | Don't know | 64 |
Just FYI, I think the answer here is 56 for RISC-V.
~Andrew
Andrew got it: 56.
Thanks Andrew, Bobby.
Bobby, I couldn't see PADDR_BITS defined anywhere. Did I miss something ?
If not, will you define PADDR_BITS somewhere in xen/arch/riscv/* ?
- Ayan
