On 02/03/18 18:26, Stefano Stabellini wrote:
>
>>> Suggested-by: Julien Grall
>>> Signed-off-by: Stefano Stabellini
>>>
>>> ---
>>> Changes in v3:
>>> - new patch
>>>
>>> ---
>>> Interestingly I couldn't find a better way in C89 to printk a size_t
>>> than casting it to unsigned long.
>> You can
On Fri, 2 Mar 2018, Stefano Stabellini wrote:
> On Fri, 2 Mar 2018, Julien Grall wrote:
> > Hi,
> >
> > On 01/03/18 23:27, Stefano Stabellini wrote:
> > > See the corresponding Linux commit as reference:
> > >
> > >commit f91e2c3bd427239c198351f44814dd39db91afe0
> > >Author: Catalin Marin
On Fri, 2 Mar 2018, Andrew Cooper wrote:
> On 02/03/18 18:26, Stefano Stabellini wrote:
> >
> >>> Suggested-by: Julien Grall
> >>> Signed-off-by: Stefano Stabellini
> >>>
> >>> ---
> >>> Changes in v3:
> >>> - new patch
> >>>
> >>> ---
> >>> Interestingly I couldn't find a better way in C89 to pr
On 02/03/2018 18:33, Stefano Stabellini wrote:
On Fri, 2 Mar 2018, Stefano Stabellini wrote:
On Fri, 2 Mar 2018, Julien Grall wrote:
Hi,
On 01/03/18 23:27, Stefano Stabellini wrote:
See the corresponding Linux commit as reference:
commit f91e2c3bd427239c198351f44814dd39db91afe0
Aut
On 02/03/2018 18:35, Stefano Stabellini wrote:
On Fri, 2 Mar 2018, Andrew Cooper wrote:
On 02/03/18 18:26, Stefano Stabellini wrote:
Suggested-by: Julien Grall
Signed-off-by: Stefano Stabellini
---
Changes in v3:
- new patch
---
Interestingly I couldn't find a better way in C89 to print
This causes objdump not to try and disassemble the data.
While altering this area, switch to using .balign, and fill with 0xc2 to help
highlight the embedded padding (rather than having it filled with 0f 1f 40 00
which is a long nop). Also, shorten the labels by stripping off the _start
suffix.
flight 120164 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120164/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 13 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm 1
On 02/03/18 11:09, Wei Liu wrote:
> On Thu, Mar 01, 2018 at 05:01:55PM +, Roger Pau Monné wrote:
>> On Thu, Mar 01, 2018 at 04:01:23PM +, Wei Liu wrote:
>>> On Thu, Mar 01, 2018 at 03:57:18PM +, Andrew Cooper wrote:
On 01/03/18 12:22, Wei Liu wrote:
> On Wed, Feb 28, 2018 at 10
There can be processors of different kinds on a single system. Make
processor a per_cpu variable pointing to the right processor type for
each core.
Suggested-by: Julien Grall
Signed-off-by: Stefano Stabellini
Reviewed-by: Julien Grall
---
Changes in v2:
- add patch
---
xen/arch/arm/processor.
See the corresponding Linux commit as reference:
commit f91e2c3bd427239c198351f44814dd39db91afe0
Author: Catalin Marinas
Date: Tue Dec 7 16:52:04 2010 +0100
ARM: 6527/1: Use CTR instead of CCSIDR for the D-cache line size on ARMv7
The current implementation of the dcache_lin
On big.LITTLE systems not all cores have the same ACTLR. Instead of
reading ACTLR and setting v->arch.actlr in vcpu_initialise, do it later
on the same pcpu where the vcpu will run.
This way, assuming that the vcpu has been created with the right pcpu
affinity, the guest will be able to read the r
Hi all,
This series changes the initialization of two virtual registers to make
sure they match the value of the underlying physical cpu.
It also disables cpus different from the boot cpu, unless a newly
introduced command line option is specified. In that case, it explains
how to setup the syste
From: Julien Grall
From: Julien Grall
Xen does not properly support big.LITTLE platform. All vCPUs of a guest
will always have the MIDR of the boot CPU (see arch_domain_create).
At best the guest may see unreliable performance (vCPU switching between
big and LITTLE), at worst the guest will bec
On 28/02/18 12:57, Jan Beulich wrote:
> These gain register forms now.
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
___
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
On big.LITTLE systems not all cores have the same MIDR. Instead of
storing only one VPIDR per domain, initialize it to the value of the
MIDR of the pCPU where the vCPU will run.
This way, assuming that the vCPU has been created with the right pCPU
affinity, the guest will be able to read the right
Even different cpus in big.LITTLE systems are expected to have the same
dcache line size. Unless the minimum of all dcache line sizes is used
across all cpu cores, cache coherency protocols can go wrong. Instead,
for now, just disable any cpu with a different dcache line size.
This check is not co
Introduce a new document about big.LITTLE and update the documentation
of hmp-unsafe.
Also update the warning messages to point users to the docs.
Signed-off-by: Stefano Stabellini
Acked-by: Julien Grall
CC: jbeul...@suse.com
CC: konrad.w...@oracle.com
CC: t...@xen.org
CC: wei.l...@citrix.com
C
On 02/03/18 07:10, Jan Beulich wrote:
On 01.03.18 at 17:58, wrote:
>> On 01/03/18 10:54, Jan Beulich wrote:
>> On 01.03.18 at 11:36, wrote:
On Thu, Mar 01, 2018 at 12:28:27AM -0700, Jan Beulich wrote:
Andrew Cooper 02/28/18 7:20 PM >>>
>> On 28/02/18 16:22, Jan Beulich
flight 120111 xen-4.10-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120111/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-amd64-pvgrub broken
test-amd64-amd64-xl-qemut-ws16-amd64
Here is the patch for updating the canonical definition of the
hvm_start_info struct corresponding to the discussion happening on the
linux-kernel and kvm mailing lists regarding Qemu/KVM use of the PVH
entry point:
KVM: x86: Allow Qemu/KVM to use PVH entry point
https://lkml.org/lkml/2018/2
The start info structure that is defined as part of the x86/HVM direct boot
ABI and used for starting Xen PVH guests would be more versatile if it also
included a way to pass information about the memory map to the guest. This
would allow KVM guests to share the same entry point.
Signed-off-by: Ma
On Fri, Mar 02, 2018 at 12:54:29PM -0800, Maran Wilson wrote:
> The start info structure that is defined as part of the x86/HVM direct boot
> ABI and used for starting Xen PVH guests would be more versatile if it also
> included a way to pass information about the memory map to the guest. This
> wo
On Fri, Mar 02, 2018 at 04:39:59PM +0100, Lars Kurth wrote:
> Hi all,
> (sorry for the extensive distribution list - I went through MAINTAINERS and
> people who may have an interest)
>
> I would like to start organizing a recurring x86 community call to discuss
> and sync-up on upcoming feature
On 3/2/2018 1:20 PM, Konrad Rzeszutek Wilk wrote:
On Fri, Mar 02, 2018 at 12:54:29PM -0800, Maran Wilson wrote:
The start info structure that is defined as part of the x86/HVM direct boot
ABI and used for starting Xen PVH guests would be more versatile if it also
included a way to pass informati
flight 120169 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120169/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 13 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm 1
On Tue, 27 Feb 2018, julien.gr...@arm.com wrote:
> From: Julien Grall
>
> A follow-up patch will require to have all interrupts routed to the
> hardware registered before calling prepare_dtb/prepare_acpi.
>
> At the moment, it is not necessary to call platform specific mappings
> (gic and platfo
On Tue, 27 Feb 2018, julien.gr...@arm.com wrote:
> From: Stewart Hildebrand
>
> Since commit "xen/arm: domain_build: Rework the way to allocate the
> event channel interrupt", it is not possible for an irq to be both below 16
> and greater/equal than 32.
>
> Also fix the reference to linux docum
On Tue, 27 Feb 2018, julien.gr...@arm.com wrote:
> From: Julien Grall
>
> At the moment, a placeholder will be created in the device-tree for the
> event channel information. Later in the domain construction, the
> interrupt for the event channel upcall will be allocated the device-tree
> fixed u
On Wed, 28 Feb 2018, Julien Grall wrote:
> Commit 7d623b358a4 "arm/mem_access: Add long-descriptor based gpt"
> assumed the read-write lock can be taken recursively. However, this
> assumption is wrong and will lead to deadlock when the lock is
> contended.
>
> To avoid the nested lock, rework the
flight 120116 xen-4.8-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120116/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-armhf-armhf-xl-rtds 17 guest-start.2 fail blocked in 119771
test-amd64-amd64-xl-qemut-win7-am
On Fri, Mar 2, 2018 at 8:39 AM, Lars Kurth wrote:
> Hi all,
> (sorry for the extensive distribution list - I went through MAINTAINERS and
> people who may have an interest)
>
> I would like to start organizing a recurring x86 community call to discuss
> and sync-up on upcoming features for Xen o
flight 120177 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120177/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 13 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm 1
flight 120122 libvirt real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120122/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-armhf-armhf-libvirt-xsm 14 saverestore-support-checkfail like 120084
test-armhf-armhf-libvirt 14 saveresto
flight 120120 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120120/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-xl-qemuu-debianhvm-amd64-xsm 16 guest-localmigrate/x10 fail
REGR. vs. 120037
tes
>>> On 02.03.18 at 08:44, wrote:
On 01.03.18 at 19:23, wrote:
>> --- a/xen/arch/x86/smpboot.c
>> +++ b/xen/arch/x86/smpboot.c
>> @@ -747,10 +747,9 @@ static int clone_mapping(const void *ptr,root_pgentry_t
>> *rpt)
>> if ( l1e_get_flags(*pl1e) & _PAGE_PRESENT )
>> {
>> AS
Today cpu_info->xen_cr3 is either 0 to indicate %cr3 doesn't need to
be switched on entry to Xen, or negative for keeping the value while
indicating not to restore %cr3, or positive in case %cr3 is to be
restored.
Switch to use a flag byte instead of a negative xen_cr3 value in order
to allow %cr3
This patch series aims at reducing the overhead of the XPTI Meltdown
mitigation. It is based on Jan's XPTI speedup series and Wei's series
for support of PCID and INVPCID.
Patch 1 had been posted before, the main changes in this patch are due
to addressing Jan's comments on my first version. The m
Avoid flushing the complete TLB when switching %cr3 for mitigation of
Meltdown by using the PCID feature if available.
We are using 4 PCID values for a 64 bit pv domain subject to XPTI:
- hypervisor active and guest in kernel mode
- guest active and in kernel mode
- hypervisor active and guest in
Instead of flushing the TLB from global pages when switching address
spaces with XPTI being active just disable global pages via %cr4
completely when a domain subject to XPTI is active. This avoids the
need for extra TLB flushes as loading %cr3 will remove all TLB
entries.
Signed-off-by: Juergen G
When switching to a 64-bit pv context the TLB is flushed twice today:
the first time when switching to the new address space in
write_ptbase(), the second time when switching to guest mode in
restore_to_guest.
Avoid the first TLB flush in that case.
Signed-off-by: Juergen Gross
---
xen/arch/x86
For mitigation of Meltdown the current L4 page table is copied to the
cpu local root page table each time a 64 bit pv guest is entered.
Copying can be avoided in cases where the guest L4 page table hasn't
been modified while running the hypervisor, e.g. when handling
interrupts or any hypercall no
flight 120100 xtf real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120100/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
xtf e5a9c74084130f8e23bc457b98b4084d2dcacd58
baseline version:
xtf 3a83f436494b9cc46582c9
Instead of switching XPTI globally on or off add a per-domain flag for
that purpose. This allows to modify the xpti boot parameter to support
running dom0 without Meltdown mitigations. Using "xpti=nodom0" as boot
parameter will achieve that.
Move the xpti boot parameter handling to xen/arch/x86/pv
>>> On 01.03.18 at 19:33, wrote:
> c/s 1308f0170c merged .init.text and .init.data, because EFI might properly
> write-protect r/o sections.
>
> However, that change makes xen-syms unusable for disassembly analysis. In
> particular, searching for indirect branches as part of the SP2/Spectre
> mi
On 02/28/2018 02:50 PM, Jan Beulich wrote:
> 01: extend vbroadcasts{s,d} to AVX2
> 02: support most remaining AVX2 insns
> 03: support AVX2 gather insns
> 04: support XOP insns
> 05: support 3DNow! insns
> 06: place test blobs in executable section
> 07: move and rename XSTATE_*
> 08: abstract out
Hi,
On 01/03/18 23:27, Stefano Stabellini wrote:
See the corresponding Linux commit as reference:
commit f91e2c3bd427239c198351f44814dd39db91afe0
Author: Catalin Marinas
Date: Tue Dec 7 16:52:04 2010 +0100
ARM: 6527/1: Use CTR instead of CCSIDR for the D-cache line size on A
flight 120095 qemu-mainline real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120095/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-armhf-armhf-libvirt-xsm 14 saverestore-support-checkfail like 120061
test-armhf-armhf-libvirt 14 sav
Hi,
Something is wrong with the threading of this series. Most of the
patches are threaded below #1 rather than #0.
On 01/03/18 23:26, Stefano Stabellini wrote:
On big.LITTLE systems not all cores have the same MIDR. Instead of
storing only one VPIDR per domain, initialize it to the value of
On 01/03/18 23:26, Stefano Stabellini wrote:
Introduce a new document about big.LITTLE and update the documentation
of hmp-unsafe.
Also update the warning messages to point users to the docs.
Signed-off-by: Stefano Stabellini
Acked-by: Julien Grall
CC: jbeul...@suse.com
CC: konrad.w...@
Hi,
I forgot to mention in the title:
You read the minimum D-Cache line size. The minimum I-Cache line size is
read from CTR_EL0.IminLine.
Cheers,
On 01/03/18 23:27, Stefano Stabellini wrote:
See the corresponding Linux commit as reference:
commit f91e2c3bd427239c198351f44814dd39db91afe
Hi Stefano,
On 01/03/18 23:26, Stefano Stabellini wrote:
Even different cpus in big.LITTLE systems are expected to have the same
cacheline size. Unless the minimum of all cacheline sizes is used across
all cpu cores, cache coherency protocols can go wrong. Instead, for
now, just disable any cpu
On Mon, Feb 26, 2018 at 11:28:39AM -0700, Jim Fehlig wrote:
> Applications like libvirt may not populate a device devid field,
> delegating that to libxl. If needed, the application can later
> retrieve the libxl-produced devid. Indeed most devices are handled
> this way in libvirt, channel devices
On Thu, Mar 01, 2018 at 11:17:13AM -0800, Stefano Stabellini wrote:
> In recognition of his expertise and commitment to Xen Project, please
> join me in welcoming Julien among the Committers and REST Maintainers.
>
> Signed-off-by: Stefano Stabellini
Acked-by: Wei Liu
_
On Fri, Mar 02, 2018 at 09:14:01AM +0100, Juergen Gross wrote:
> Instead of flushing the TLB from global pages when switching address
> spaces with XPTI being active just disable global pages via %cr4
> completely when a domain subject to XPTI is active. This avoids the
> need for extra TLB flushes
On Thu, Mar 01, 2018 at 05:01:55PM +, Roger Pau Monné wrote:
> On Thu, Mar 01, 2018 at 04:01:23PM +, Wei Liu wrote:
> > On Thu, Mar 01, 2018 at 03:57:18PM +, Andrew Cooper wrote:
> > > On 01/03/18 12:22, Wei Liu wrote:
> > > > On Wed, Feb 28, 2018 at 10:20:53AM +, Roger Pau Monne wr
Commit 422588e885 ("x86/xpti: Hide almost all of .text and all
.data/.rodata/.bss mappings") carefully limited the Xen image cloning to
just entry code, but then overwrote the just allocated and populated L3
entry with the normal one again covering both Xen image and stubs.
Drop the respective cod
There's no reason to keep the unused pages (of which there are actually
two; respective commentary also gets adjusted) mapped.
Signed-off-by: Jan Beulich
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5563,10 +5563,11 @@ void memguard_unguard_range(void *p, uns
void memguard_guard_stack(
On Wed, Feb 28, 2018 at 05:17:23PM +0800, Haozhong Zhang wrote:
> On 02/27/18 17:37 +, Anthony PERARD wrote:
> > On Thu, Dec 07, 2017 at 06:10:22PM +0800, Haozhong Zhang wrote:
> > > Add a function in libacpi to detect QEMU fw_cfg interface. Limit the
> > > usage of fw_cfg interface to hvmloade
>>> On 02.03.18 at 12:09, wrote:
> On Thu, Mar 01, 2018 at 05:01:55PM +, Roger Pau Monné wrote:
>> On Thu, Mar 01, 2018 at 04:01:23PM +, Wei Liu wrote:
>> > On Thu, Mar 01, 2018 at 03:57:18PM +, Andrew Cooper wrote:
>> > > On 01/03/18 12:22, Wei Liu wrote:
>> > > > On Wed, Feb 28, 2018
On 02/03/18 12:03, Wei Liu wrote:
> On Fri, Mar 02, 2018 at 09:14:01AM +0100, Juergen Gross wrote:
>> Instead of flushing the TLB from global pages when switching address
>> spaces with XPTI being active just disable global pages via %cr4
>> completely when a domain subject to XPTI is active. This
>>> On 01.03.18 at 20:21, wrote:
> On 08/02/18 09:20, Jan Beulich wrote:
> On 07.02.18 at 20:35, wrote:
>>> On 07/02/18 16:12, Jan Beulich wrote:
I'm not sure why I didn't do this right away: By avoiding the use of
global PTEs in the cloned directmap, there's no need to fiddle with
On 02/03/18 11:34, Jan Beulich wrote:
On 01.03.18 at 20:21, wrote:
>> On 08/02/18 09:20, Jan Beulich wrote:
>> On 07.02.18 at 20:35, wrote:
On 07/02/18 16:12, Jan Beulich wrote:
> I'm not sure why I didn't do this right away: By avoiding the use of
> global PTEs in the clone
On Wed, Feb 28, 2018 at 03:56:54PM +0800, Haozhong Zhang wrote:
> On 02/27/18 16:41 +, Anthony PERARD wrote:
> > On Thu, Dec 07, 2017 at 06:18:05PM +0800, Haozhong Zhang wrote:
> > > @@ -108,7 +109,10 @@ void pc_dimm_memory_plug(DeviceState *dev,
> > > MemoryHotplugState *hpms,
> > > }
>
On 02/03/18 11:24, Jan Beulich wrote:
> There's no reason to keep the unused pages (of which there are actually
> two; respective commentary also gets adjusted) mapped.
>
> Signed-off-by: Jan Beulich
>
> --- a/xen/arch/x86/mm.c
> +++ b/xen/arch/x86/mm.c
> @@ -5563,10 +5563,11 @@ void memguard_ungu
>>> On 02.03.18 at 12:51, wrote:
> On 02/03/18 11:24, Jan Beulich wrote:
>> --- a/xen/arch/x86/mm.c
>> +++ b/xen/arch/x86/mm.c
>> @@ -5563,10 +5563,11 @@ void memguard_unguard_range(void *p, uns
>>
>> void memguard_guard_stack(void *p)
>> {
>> -BUILD_BUG_ON((PRIMARY_STACK_SIZE + PAGE_SIZE)
On Wed, Feb 28, 2018 at 05:36:59PM +0800, Haozhong Zhang wrote:
> On 02/27/18 17:22 +, Anthony PERARD wrote:
> > On Thu, Dec 07, 2017 at 06:18:02PM +0800, Haozhong Zhang wrote:
> > > This is the QEMU part patches that works with the associated Xen
> > > patches to enable vNVDIMM support for Xen
On 02/03/18 12:23, Jan Beulich wrote:
> Commit 422588e885 ("x86/xpti: Hide almost all of .text and all
> .data/.rodata/.bss mappings") carefully limited the Xen image cloning to
> just entry code, but then overwrote the just allocated and populated L3
> entry with the normal one again covering both
flight 120099 xen-4.6-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120099/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-xtf-amd64-amd64-1 50 xtf/test-hvm64-lbr-tsx-vmentry fail REGR. vs. 119227
test-amd64-amd6
On Mon, Feb 26, 2018 at 09:53:38AM -0700, Jim Fehlig wrote:
> On 02/26/2018 01:46 AM, Juergen Gross wrote:
> > When creating a pthread in xs_watch() try to get the minimal needed
> > size of the thread from glibc instead of using a constant. This avoids
> > problems when the library is used in prog
On Mon, Feb 26, 2018 at 10:33:40AM +, Wei Liu wrote:
> On Fri, Feb 23, 2018 at 11:48:57PM +0100, Paul Semel wrote:
> > The maximum size for the input size was set to INPUT_SIZE, which is actually
> > the size of the data array inside the fuzz_corpus structure and so was not
> > abling user (or
>>> On 02.03.18 at 13:16, wrote:
> On 02/03/18 12:23, Jan Beulich wrote:
>> Commit 422588e885 ("x86/xpti: Hide almost all of .text and all
>> .data/.rodata/.bss mappings") carefully limited the Xen image cloning to
>> just entry code, but then overwrote the just allocated and populated L3
>> entry
On Fri, Mar 02, 2018 at 12:29:31PM +, Wei Liu wrote:
> On Mon, Feb 26, 2018 at 09:53:38AM -0700, Jim Fehlig wrote:
> > On 02/26/2018 01:46 AM, Juergen Gross wrote:
> > > When creating a pthread in xs_watch() try to get the minimal needed
> > > size of the thread from glibc instead of using a co
On 02/03/18 13:40, Wei Liu wrote:
> On Fri, Mar 02, 2018 at 12:29:31PM +, Wei Liu wrote:
>> On Mon, Feb 26, 2018 at 09:53:38AM -0700, Jim Fehlig wrote:
>>> On 02/26/2018 01:46 AM, Juergen Gross wrote:
When creating a pthread in xs_watch() try to get the minimal needed
size of the thre
On Fri, Feb 23, 2018 at 11:26:17PM -0600, Doug Goldstein wrote:
> On 4/28/16 12:40 PM, Wei Liu wrote:
> > On Tue, Apr 26, 2016 at 09:38:45AM -0500, Doug Goldstein wrote:
> >> When building debug use -Og as the optimization level if its available,
> >> otherwise retain the use of -O0. -Og has been a
On 02/03/18 12:01, Jan Beulich wrote:
>
> @@ -16,9 +16,9 @@
> *
> * 7 - Primary stack (with a struct cpu_info at the top)
> * 6 - Primary stack
> - * 5 - Optionally not preset (MEMORY_GUARD)
> - * 4 - unused
> - * 3 - Syscall trampolines
> + * 5 - Optionally not present (MEMORY_GUARD)
> + * 4
Hi,
On 26/02/18 16:30, Julien Grall wrote:
>
>
> On 02/26/2018 04:25 PM, Andre Przywara wrote:
>> Hi,
>>
>> On 26/02/18 15:55, Julien Grall wrote:
>>> Hi,
>>>
>>> On 02/26/2018 03:29 PM, Andre Przywara wrote:
On 13/02/18 16:35, Julien Grall wrote:
>> diff --git a/xen/arch/arm/vgic/vgic.
On 02/03/18 13:53, Andre Przywara wrote:
Hi,
Hi Andre,
On 26/02/18 16:30, Julien Grall wrote:
On 02/26/2018 04:25 PM, Andre Przywara wrote:
Hi,
On 26/02/18 15:55, Julien Grall wrote:
Hi,
On 02/26/2018 03:29 PM, Andre Przywara wrote:
On 13/02/18 16:35, Julien Grall wrote:
diff --git
On 20/02/18 05:56, Simon Gaiser wrote:
> Juergen Gross:
>> On 07/02/18 23:22, Simon Gaiser wrote:
>>> Commit fd8aa9095a95 ("xen: optimize xenbus driver for multiple
>>> concurrent xenstore accesses") made a subtle change to the semantic of
>>> xenbus_dev_request_and_reply() and xenbus_transaction_e
On 27/02/18 21:09, Julien Grall wrote:
> Hi,
>
> On 27/02/2018 20:03, Stefano Stabellini wrote:
>> On Tue, 27 Feb 2018, Julien Grall wrote:
>>> Hi,
>>>
>>> On 26/02/18 12:32, Juergen Gross wrote:
On 26/02/18 13:06, Andrii Anisov wrote:
> Hello Juergen,
>
>
> On 26.02.18 13:08,
On Wed, Feb 28, 2018 at 6:38 PM, Hans-Joachim Kliemeck wrote:
>
> George Dunlap:
>
> /On 01/23/2018 04:06 AM, Simon Gaiser wrote:/
> /> George Dunlap:/
> />> Part of our solution to XSA-254 SP3 (aka "Meltdown") is to backport/
> />> the PVH mode from 4.10 to 4.9 and 4.8. This will first allow peop
On Fri, Mar 02, 2018 at 01:45:14PM +0100, Juergen Gross wrote:
> On 02/03/18 13:40, Wei Liu wrote:
> > On Fri, Mar 02, 2018 at 12:29:31PM +, Wei Liu wrote:
> >> On Mon, Feb 26, 2018 at 09:53:38AM -0700, Jim Fehlig wrote:
> >>> On 02/26/2018 01:46 AM, Juergen Gross wrote:
> When creating a
1: really hide almost all of Xen image
2: don't map stack guard pages
Signed-off-by: Jan Beulich
---
v2: Add missing cleanup to patch 1. New patch 2.
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On Thu, 2018-03-01 at 16:19 +, Roger Pau Monne wrote:
> Commit 406817 doesn't update nested VMX code in order to take into
> account L1 CR4 host mask when nested guest (L2) writes to CR4, and
> thus the mask written to CR4_GUEST_HOST_MASK is likely not as
> restrictive as it should be.
>
> Als
>>> On 02.03.18 at 15:22, wrote:
> I'd be in favor of merging the 4.8.3pre-shim-comet and
> 4.10.0-shim-comet branches into staging-4.8 and staging-4.10
> respectively (assuming that's suitable). Are there any other fixes to
> PVH / PVshim hosting that we'd need to backport as well?
That depends
Commit 422588e885 ("x86/xpti: Hide almost all of .text and all
.data/.rodata/.bss mappings") carefully limited the Xen image cloning to
just entry code, but then overwrote the just allocated and populated L3
entry with the normal one again covering both Xen image and stubs.
Drop the respective cod
Other than for the main mappings, don't even do this in release builds,
as there are no huge page shattering concerns here.
Signed-off-by: Jan Beulich
---
v2: New.
--- a/xen/arch/x86/smpboot.c
+++ b/xen/arch/x86/smpboot.c
@@ -799,7 +799,8 @@ static int setup_cpu_root_pgt(unsigned i
/* Ins
On Fri, Mar 02, 2018 at 07:31:43AM -0700, Jan Beulich wrote:
> >>> On 02.03.18 at 15:22, wrote:
> > I'd be in favor of merging the 4.8.3pre-shim-comet and
> > 4.10.0-shim-comet branches into staging-4.8 and staging-4.10
> > respectively (assuming that's suitable). Are there any other fixes to
> >
>>> On 21.02.18 at 15:02, wrote:
> A few files override page_to_mfn/mfn_to_page but actually never use
> those macros. So drop them.
>
> Signed-off-by: Julien Grall
It doesn't look like there are any risky uses of the removed
symbols in the headers, so
Acked-by: Jan Beulich
assuming this has b
Hi,
On 02/03/18 14:42, Jan Beulich wrote:
On 21.02.18 at 15:02, wrote:
A few files override page_to_mfn/mfn_to_page but actually never use
those macros. So drop them.
Signed-off-by: Julien Grall
It doesn't look like there are any risky uses of the removed
symbols in the headers, so
Acked-b
>>> On 21.02.18 at 15:02, wrote:
> No functional change intended.
>
> Signed-off Julien Grall
Acked-by: Jan Beulich
with one remark:
> @@ -5545,8 +5547,7 @@ static void __memguard_change_range(void *p, unsigned
> long l, int guard)
> if ( guard )
> flags &= ~_PAGE_PRESENT;
>
Hi Jan,
On 02/03/18 14:45, Jan Beulich wrote:
On 21.02.18 at 15:02, wrote:
No functional change intended.
Signed-off Julien Grall
Acked-by: Jan Beulich
with one remark:
@@ -5545,8 +5547,7 @@ static void __memguard_change_range(void *p, unsigned
long l, int guard)
if ( guard )
Provide the functions needed for different modes. And cpu_has_invpcid.
Signed-off-by: Wei Liu
---
This is useful for Juergen's XPTI improvement series.
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Juergen Gross
---
xen/arch/x86/Rules.mk| 1 +
xen/include/asm-x86/cpufeature.h | 1 +
xe
On Wed, Feb 28, 2018 at 07:33:55AM -0700, Jan Beulich wrote:
> >>> On 23.01.18 at 16:07, wrote:
> > @@ -255,6 +256,23 @@ static void modify_bars(const struct pci_dev *pdev,
> > bool map, bool rom)
> > }
> > }
> >
> > +/* Remove any MSIX regions if present. */
> > +for ( i
On 02/03/18 15:28, Wei Liu wrote:
> On Fri, Mar 02, 2018 at 01:45:14PM +0100, Juergen Gross wrote:
>> On 02/03/18 13:40, Wei Liu wrote:
>>> On Fri, Mar 02, 2018 at 12:29:31PM +, Wei Liu wrote:
On Mon, Feb 26, 2018 at 09:53:38AM -0700, Jim Fehlig wrote:
> On 02/26/2018 01:46 AM, Juergen
On 02/03/18 14:47, Wei Liu wrote:
> Provide the functions needed for different modes. And cpu_has_invpcid.
>
> Signed-off-by: Wei Liu
> ---
> This is useful for Juergen's XPTI improvement series.
>
> Cc: Jan Beulich
> Cc: Andrew Cooper
> Cc: Juergen Gross
> ---
> xen/arch/x86/Rules.mk
>>> On 22.02.18 at 17:55, wrote:
> On 22/02/18 16:51, Wei Liu wrote:
>> On Thu, Feb 22, 2018 at 04:40:04PM +, Julien Grall wrote:
>>> On 22/02/18 16:35, Wei Liu wrote:
On Wed, Feb 21, 2018 at 02:02:51PM +, Julien Grall wrote:
> The function populate_pt_range is used to populate in
Juergen Gross:
> On 20/02/18 05:56, Simon Gaiser wrote:
>> Juergen Gross:
>>> On 07/02/18 23:22, Simon Gaiser wrote:
Commit fd8aa9095a95 ("xen: optimize xenbus driver for multiple
concurrent xenstore accesses") made a subtle change to the semantic of
xenbus_dev_request_and_reply() an
On Fri, Mar 02, 2018 at 02:54:16PM +, Andrew Cooper wrote:
> On 02/03/18 14:47, Wei Liu wrote:
> > Provide the functions needed for different modes. And cpu_has_invpcid.
> >
> > Signed-off-by: Wei Liu
> > ---
> > This is useful for Juergen's XPTI improvement series.
> >
> > Cc: Jan Beulich
>
>>> On 21.02.18 at 15:02, wrote:
> --- a/xen/arch/x86/x86_64/mm.c
> +++ b/xen/arch/x86/x86_64/mm.c
> @@ -40,6 +40,10 @@ asm(".file \"" __FILE__ "\"");
> #include
> #include
>
> +/* Override macros from asm/page.h to make them work with mfn_t */
> +#undef page_to_mfn
> +#define page_to_mfn(pg
>>> On 02.03.18 at 16:06, wrote:
On 21.02.18 at 15:02, wrote:
>> --- a/xen/arch/x86/x86_64/mm.c
>> +++ b/xen/arch/x86/x86_64/mm.c
>> @@ -40,6 +40,10 @@ asm(".file \"" __FILE__ "\"");
>> #include
>> #include
>>
>> +/* Override macros from asm/page.h to make them work with mfn_t */
>> +#
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