> -Original Message-
> From: Jan Beulich [mailto:jbeul...@suse.com]
> Sent: 15 March 2019 16:17
> To: Paul Durrant
> Cc: Julien Grall ; Andrew Cooper
> ; George Dunlap
> ; Ian Jackson ; Roger Pau
> Monne
> ; Wei Liu ; Stefano Stabellini
> ;
> xen-devel ; Konrad Rzeszutek Wilk
> ; Tim
>
>>> On 15.03.19 at 16:40, wrote:
> So, AIUI the reason you wanted it added was that you wanted to avoid
> multiple calls hvm_vcpu_has_pending_irq() from returning different intack
> values? But looking again, this could easily happen if a higher irr bit gets
> set between calls (which can appar
> -Original Message-
> From: Jan Beulich [mailto:jbeul...@suse.com]
> Sent: 15 March 2019 09:53
> To: Paul Durrant
> Cc: Julien Grall ; Andrew Cooper
> ; Roger Pau Monne
> ; Wei Liu ; George Dunlap
> ; Ian
> Jackson ; Stefano Stabellini
> ; xen-devel de...@lists.xenproject.org>; Konrad
> -Original Message-
> From: Jan Beulich [mailto:jbeul...@suse.com]
> Sent: 15 March 2019 09:53
> To: Paul Durrant
> Cc: Julien Grall ; Andrew Cooper
> ; Roger Pau Monne
> ; Wei Liu ; George Dunlap
> ; Ian
> Jackson ; Stefano Stabellini
> ; xen-devel de...@lists.xenproject.org>; Konrad
>>> On 14.03.19 at 19:11, wrote:
> This patch introduces an implementation of the STIMER0-15_CONFIG/COUNT MSRs
> and hence a the first SynIC message source.
>
> The new (and documented) 'stimer' viridian enlightenment group may be
> specified to enable this feature.
>
> While in the neighbourhoo
