> -----Original Message-----
> From: Jan Beulich [mailto:jbeul...@suse.com]
> Sent: 15 March 2019 16:17
> To: Paul Durrant <paul.durr...@citrix.com>
> Cc: Julien Grall <julien.gr...@arm.com>; Andrew Cooper 
> <andrew.coop...@citrix.com>; George Dunlap
> <george.dun...@citrix.com>; Ian Jackson <ian.jack...@citrix.com>; Roger Pau 
> Monne
> <roger....@citrix.com>; Wei Liu <wei.l...@citrix.com>; Stefano Stabellini 
> <sstabell...@kernel.org>;
> xen-devel <xen-devel@lists.xenproject.org>; Konrad Rzeszutek Wilk 
> <konrad.w...@oracle.com>; Tim
> (Xen.org) <t...@xen.org>
> Subject: RE: [PATCH v7 10/11] viridian: add implementation of synthetic timers
> 
> >>> On 15.03.19 at 16:40, <paul.durr...@citrix.com> wrote:
> > So, AIUI the reason you wanted it added was that you wanted to avoid
> > multiple calls hvm_vcpu_has_pending_irq() from returning different intack
> > values? But looking again, this could easily happen if a higher irr bit gets
> > set between calls (which can apparently happen asynchronously) so I'm really
> > no longer sure why I need to avoid multiple polls. What is the problem that
> > needs to be avoided?
> 
> Hmm, true. Looks like I've mis-guided you, I'm sorry for that.
> 

Ok. I'll send a follow-up patch to pull it out, and I've also just now found a 
mistake in the handling of absolute timers so I'll send a patch for that too.

  Paul

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