Hi,
On 12/03/18 02:57, Peng Fan wrote:
Hi Stefano,
On Fri, Mar 09, 2018 at 05:09:20PM -0800, Stefano Stabellini wrote:
On Fri, 9 Mar 2018, Julien Grall wrote:
Furthermore, the workaround is not in Linux upstream and I doubt this will be
accepted as it is. So I am not convinced that we should m
On 12/03/18 02:32, Peng Fan wrote:
On Fri, Mar 09, 2018 at 02:40:25PM +, Julien Grall wrote:
Hi,
On 09/03/18 13:30, Peng Fan wrote:
Hi Julien,
On Fri, Mar 09, 2018 at 10:22:09AM +, Julien Grall wrote:
Hi Peng,
On 09/03/18 09:05, Peng Fan wrote:
On Thu, Mar 08, 2018 at 03:13:50PM +
Hi Stefano,
On Fri, Mar 09, 2018 at 05:09:20PM -0800, Stefano Stabellini wrote:
>On Fri, 9 Mar 2018, Julien Grall wrote:
>> Furthermore, the workaround is not in Linux upstream and I doubt this will be
>> accepted as it is. So I am not convinced that we should modify Xen interface
>> for that.
>>
On Fri, Mar 09, 2018 at 02:40:25PM +, Julien Grall wrote:
>Hi,
>
>On 09/03/18 13:30, Peng Fan wrote:
>>Hi Julien,
>>On Fri, Mar 09, 2018 at 10:22:09AM +, Julien Grall wrote:
>>>Hi Peng,
>>>
>>>On 09/03/18 09:05, Peng Fan wrote:
On Thu, Mar 08, 2018 at 03:13:50PM +, Julien Grall wrot
On Fri, 9 Mar 2018, Julien Grall wrote:
> Furthermore, the workaround is not in Linux upstream and I doubt this will be
> accepted as it is. So I am not convinced that we should modify Xen interface
> for that.
>
> Anyway, given that your silicon is going to be respined, then you probably
> want t
Hi,
On 09/03/18 13:30, Peng Fan wrote:
Hi Julien,
On Fri, Mar 09, 2018 at 10:22:09AM +, Julien Grall wrote:
Hi Peng,
On 09/03/18 09:05, Peng Fan wrote:
On Thu, Mar 08, 2018 at 03:13:50PM +, Julien Grall wrote:
On 08/03/18 12:43, Peng Fan wrote:
There are a major difference between Do
Hi Julien,
On Fri, Mar 09, 2018 at 10:22:09AM +, Julien Grall wrote:
>Hi Peng,
>
>On 09/03/18 09:05, Peng Fan wrote:
>>On Thu, Mar 08, 2018 at 03:13:50PM +, Julien Grall wrote:
>>>On 08/03/18 12:43, Peng Fan wrote:
>>>There are a major difference between Dom0 and DomU in your setup.
>>>Dom0
Hi Peng,
On 09/03/18 09:05, Peng Fan wrote:
On Thu, Mar 08, 2018 at 03:13:50PM +, Julien Grall wrote:
On 08/03/18 12:43, Peng Fan wrote:
There are a major difference between Dom0 and DomU in your setup.
Dom0 vCPUs are pinned to a specific pCPU, so they can't move around.
For DomU, each vCPU
On Thu, Mar 08, 2018 at 03:13:50PM +, Julien Grall wrote:
>Hi,
>
>On 08/03/18 12:43, Peng Fan wrote:
>>I am not sure whether this issue cause DomU big/Little not work.
>
>Well, I would recommend to speak with NXP whether this errata affects
>TLB flush for Hypervisor Page-Table o
Hi,
On 08/03/18 12:43, Peng Fan wrote:
I am not sure whether this issue cause DomU big/Little not work.
Well, I would recommend to speak with NXP whether this errata affects
TLB flush for Hypervisor Page-Table or Stage-2 Page-Table.
I tried the following, but no help. Not sure my patch is co
> -Original Message-
> From: Julien Grall [mailto:julien.gr...@arm.com]
> Sent: 2018年3月8日 20:30
> To: Peng Fan ; Peng Fan ;
> Stefano Stabellini
> Cc: xen-de...@lists.xen.org
> Subject: Re: [Xen-devel] [PATCH v4 0/7] unsafe big.LITTLE support
>
> Hi,
>
Hi,
On 08/03/18 12:23, Peng Fan wrote:
-Original Message-
From: Xen-devel [mailto:xen-devel-boun...@lists.xenproject.org] On Behalf Of
Julien Grall
Sent: 2018年3月8日 19:04
To: Peng Fan ; Stefano Stabellini
Cc: xen-de...@lists.xen.org
Subject: Re: [Xen-devel] [PATCH v4 0/7] unsafe
> -Original Message-
> From: Xen-devel [mailto:xen-devel-boun...@lists.xenproject.org] On Behalf Of
> Julien Grall
> Sent: 2018年3月8日 19:04
> To: Peng Fan ; Stefano Stabellini
>
> Cc: xen-de...@lists.xen.org
> Subject: Re: [Xen-devel] [PATCH v4 0/7] unsafe big.L
Hello,
On 08/03/18 06:15, Peng Fan wrote:
Hi Stefano,
On Fri, Mar 02, 2018 at 11:05:54AM -0800, Stefano Stabellini wrote:
Hi all,
This series changes the initialization of two virtual registers to make
sure they match the value of the underlying physical cpu.
It also disables cpus different f
Hi Stefano,
On Fri, Mar 02, 2018 at 11:05:54AM -0800, Stefano Stabellini wrote:
>Hi all,
>
>This series changes the initialization of two virtual registers to make
>sure they match the value of the underlying physical cpu.
>
>It also disables cpus different from the boot cpu, unless a newly
>introd
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