Re: [PATCH v4] x86/HVM: support emulated UMIP

2023-03-20 Thread Jan Beulich
On 17.03.2023 17:09, Roger Pau Monné wrote: > On Fri, Mar 17, 2023 at 04:01:59PM +0100, Jan Beulich wrote: >> On 17.03.2023 15:29, Roger Pau Monné wrote: >>> On Thu, Apr 15, 2021 at 11:47:42AM +0200, Jan Beulich wrote: There are three noteworthy drawbacks: 1) The intercepts we need to ena

Re: [PATCH v4] x86/HVM: support emulated UMIP

2023-03-20 Thread Jan Beulich
On 17.03.2023 17:30, Andrew Cooper wrote: > On 17/03/2023 2:29 pm, Roger Pau Monné wrote: >> On Thu, Apr 15, 2021 at 11:47:42AM +0200, Jan Beulich wrote: >>> There are three noteworthy drawbacks: >>> 1) The intercepts we need to enable here are CPL-independent, i.e. we >>>now have to emulate ce

Re: [PATCH v4] x86/HVM: support emulated UMIP

2023-03-17 Thread Andrew Cooper
On 17/03/2023 2:29 pm, Roger Pau Monné wrote: > On Thu, Apr 15, 2021 at 11:47:42AM +0200, Jan Beulich wrote: >> There are three noteworthy drawbacks: >> 1) The intercepts we need to enable here are CPL-independent, i.e. we >>now have to emulate certain instructions for ring 0. >> 2) On VMX ther

Re: [PATCH v4] x86/HVM: support emulated UMIP

2023-03-17 Thread Roger Pau Monné
On Fri, Mar 17, 2023 at 04:01:59PM +0100, Jan Beulich wrote: > On 17.03.2023 15:29, Roger Pau Monné wrote: > > On Thu, Apr 15, 2021 at 11:47:42AM +0200, Jan Beulich wrote: > >> There are three noteworthy drawbacks: > >> 1) The intercepts we need to enable here are CPL-independent, i.e. we > >>n

Re: [PATCH v4] x86/HVM: support emulated UMIP

2023-03-17 Thread Jan Beulich
On 17.03.2023 15:29, Roger Pau Monné wrote: > On Thu, Apr 15, 2021 at 11:47:42AM +0200, Jan Beulich wrote: >> There are three noteworthy drawbacks: >> 1) The intercepts we need to enable here are CPL-independent, i.e. we >>now have to emulate certain instructions for ring 0. >> 2) On VMX there'

Re: [PATCH v4] x86/HVM: support emulated UMIP

2023-03-17 Thread Roger Pau Monné
On Thu, Apr 15, 2021 at 11:47:42AM +0200, Jan Beulich wrote: > There are three noteworthy drawbacks: > 1) The intercepts we need to enable here are CPL-independent, i.e. we >now have to emulate certain instructions for ring 0. > 2) On VMX there's no intercept for SMSW, so the emulation isn't re