On Thu, Apr 15, 2021 at 11:47:42AM +0200, Jan Beulich wrote: > There are three noteworthy drawbacks: > 1) The intercepts we need to enable here are CPL-independent, i.e. we > now have to emulate certain instructions for ring 0. > 2) On VMX there's no intercept for SMSW, so the emulation isn't really > complete there.
Then I'm afraid we can't set the bit in the max CPUID policy. What about domains being migrated from a host that has UMIP to an Intel host where UMIP is emulated? They would see a change in behavior in SMSW, and the behavior won't match the ISA anymore. Thanks, Roger.
