On Wed, 24 Jun 2020, Bertrand Marquis wrote:
> > On 23 Jun 2020, at 21:50, CodeWiz2280 wrote:
> >
> > Is it possible to passthrough PCI devices to domU on the 32-bit arm
> > keystone? Any info is appreciated.
> >
> > I found some old information online that "gic-v2m" is required. I'm
> > not s
> On 23 Jun 2020, at 21:50, CodeWiz2280 wrote:
>
> Is it possible to passthrough PCI devices to domU on the 32-bit arm
> keystone? Any info is appreciated.
>
> I found some old information online that "gic-v2m" is required. I'm
> not sure if the GIC-400 on the K2E supports "gic_v2m". Based
Is it possible to passthrough PCI devices to domU on the 32-bit arm
keystone? Any info is appreciated.
I found some old information online that "gic-v2m" is required. I'm
not sure if the GIC-400 on the K2E supports "gic_v2m". Based on the
fact that there is no "gic-v2m-frame" tag in the K2E dev
On Wed, Jun 17, 2020 at 2:46 PM Stefano Stabellini
wrote:
>
> On Wed, 17 Jun 2020, CodeWiz2280 wrote:
> > On Tue, Jun 16, 2020 at 2:23 PM Marc Zyngier wrote:
> > >
> > > On 2020-06-16 19:13, CodeWiz2280 wrote:
> > > > On Tue, Jun 16, 2020 at 4:11 AM Marc Zyngier wrote:
> > > >>
> > > >> On 2020-
On Wed, 17 Jun 2020, CodeWiz2280 wrote:
> On Tue, Jun 16, 2020 at 2:23 PM Marc Zyngier wrote:
> >
> > On 2020-06-16 19:13, CodeWiz2280 wrote:
> > > On Tue, Jun 16, 2020 at 4:11 AM Marc Zyngier wrote:
> > >>
> > >> On 2020-06-15 20:14, CodeWiz2280 wrote:
> > >>
> > >> [...]
> > >>
> > >> > Also, t
On 2020-06-17 15:45, CodeWiz2280 wrote:
On Tue, Jun 16, 2020 at 2:23 PM Marc Zyngier wrote:
On 2020-06-16 19:13, CodeWiz2280 wrote:
> On Tue, Jun 16, 2020 at 4:11 AM Marc Zyngier wrote:
>>
>> On 2020-06-15 20:14, CodeWiz2280 wrote:
>>
>> [...]
>>
>> > Also, the latest linux kernel still has t
On Tue, Jun 16, 2020 at 2:23 PM Marc Zyngier wrote:
>
> On 2020-06-16 19:13, CodeWiz2280 wrote:
> > On Tue, Jun 16, 2020 at 4:11 AM Marc Zyngier wrote:
> >>
> >> On 2020-06-15 20:14, CodeWiz2280 wrote:
> >>
> >> [...]
> >>
> >> > Also, the latest linux kernel still has the X-Gene storm distributo
On 2020-06-16 19:13, CodeWiz2280 wrote:
On Tue, Jun 16, 2020 at 4:11 AM Marc Zyngier wrote:
On 2020-06-15 20:14, CodeWiz2280 wrote:
[...]
> Also, the latest linux kernel still has the X-Gene storm distributor
> address as "0x7801" in the device tree, which is what the Xen code
> consider
On Tue, Jun 16, 2020 at 4:11 AM Marc Zyngier wrote:
>
> On 2020-06-15 20:14, CodeWiz2280 wrote:
>
> [...]
>
> > Also, the latest linux kernel still has the X-Gene storm distributor
> > address as "0x7801" in the device tree, which is what the Xen code
> > considers a match with the old firmwar
On 2020-06-15 20:14, CodeWiz2280 wrote:
[...]
Also, the latest linux kernel still has the X-Gene storm distributor
address as "0x7801" in the device tree, which is what the Xen code
considers a match with the old firmware. What were the addresses for
the device tree supposed to be changed
> On 15 Jun 2020, at 22:32, Stefano Stabellini wrote:
>
> On Mon, 15 Jun 2020, CodeWiz2280 wrote:
>> On Wed, Jun 10, 2020 at 5:46 PM Julien Grall
>> wrote:
>>>
>>> Hi Marc,
>>>
>>> On Tue, 9 Jun 2020 at 18:45, Marc Zyngier wrote:
> I was wondering if you heard about any potential issu
On Mon, 15 Jun 2020, CodeWiz2280 wrote:
> On Wed, Jun 10, 2020 at 5:46 PM Julien Grall
> wrote:
> >
> > Hi Marc,
> >
> > On Tue, 9 Jun 2020 at 18:45, Marc Zyngier wrote:
> > > > I was wondering if you heard about any potential issue with guest EOI
> > > > not forwarded to the host. This is on TI
On Wed, Jun 10, 2020 at 5:46 PM Julien Grall wrote:
>
> Hi Marc,
>
> On Tue, 9 Jun 2020 at 18:45, Marc Zyngier wrote:
> > > I was wondering if you heard about any potential issue with guest EOI
> > > not forwarded to the host. This is on TI Keystone (Cortex A-15).
> >
> > Not that I know of. A-15
Hi Marc,
On Tue, 9 Jun 2020 at 18:45, Marc Zyngier wrote:
> > I was wondering if you heard about any potential issue with guest EOI
> > not forwarded to the host. This is on TI Keystone (Cortex A-15).
>
> Not that I know of. A-15 definitely works (TC2, Tegra-K1, Calxeda Midway
> all run just fine
On 10/06/2020 13:39, CodeWiz2280 wrote:
So the only way to solve this is actually to do the interrupt
deactivate inside Xen (using a maintenance interrupt).
That's a terrible hack, and one that would encourage badly integrated HW.
I appreciate the need to "make things work", but I'd be wary
On 2020-06-10 13:39, CodeWiz2280 wrote:
[...]
The problem is that a hack may be my only solution to getting this
working on this platform. If TI says that they don't support it then
i'm stuck. Just to summarize the problem, we believe that the GIC is
seeing secure accesses from dom0 when they
On Wed, Jun 10, 2020 at 4:39 AM Bertrand Marquis
wrote:
>
>
>
> > On 10 Jun 2020, at 09:20, Marc Zyngier wrote:
> >
> > On 2020-06-10 09:06, Bertrand Marquis wrote:
> >> Hi,
> >>> On 9 Jun 2020, at 18:45, Marc Zyngier wrote:
> >>> Hi Julien,
> >>> On 2020-06-09 18:32, Julien Grall wrote:
>
> On 10 Jun 2020, at 09:20, Marc Zyngier wrote:
>
> On 2020-06-10 09:06, Bertrand Marquis wrote:
>> Hi,
>>> On 9 Jun 2020, at 18:45, Marc Zyngier wrote:
>>> Hi Julien,
>>> On 2020-06-09 18:32, Julien Grall wrote:
(+ Marc)
On 09/06/2020 18:03, Bertrand Marquis wrote:
> Hi
>> O
On 2020-06-10 09:06, Bertrand Marquis wrote:
Hi,
On 9 Jun 2020, at 18:45, Marc Zyngier wrote:
Hi Julien,
On 2020-06-09 18:32, Julien Grall wrote:
(+ Marc)
On 09/06/2020 18:03, Bertrand Marquis wrote:
Hi
On 9 Jun 2020, at 16:47, Julien Grall wrote:
On 09/06/2020 16:28, Bertrand Marquis wr
Hi,
> On 9 Jun 2020, at 21:07, CodeWiz2280 wrote:
>
> On Tue, Jun 9, 2020 at 1:45 PM Marc Zyngier wrote:
>>
>> Hi Julien,
>>
>> On 2020-06-09 18:32, Julien Grall wrote:
>>> (+ Marc)
>>>
>>> On 09/06/2020 18:03, Bertrand Marquis wrote:
Hi
> On 9 Jun 2020, at 16:47, Julien Grall
Hi,
> On 9 Jun 2020, at 18:45, Marc Zyngier wrote:
>
> Hi Julien,
>
> On 2020-06-09 18:32, Julien Grall wrote:
>> (+ Marc)
>> On 09/06/2020 18:03, Bertrand Marquis wrote:
>>> Hi
On 9 Jun 2020, at 16:47, Julien Grall wrote:
On 09/06/2020 16:28, Bertrand Marquis wrote:
> Hi,
>>
On Tue, Jun 9, 2020 at 1:45 PM Marc Zyngier wrote:
>
> Hi Julien,
>
> On 2020-06-09 18:32, Julien Grall wrote:
> > (+ Marc)
> >
> > On 09/06/2020 18:03, Bertrand Marquis wrote:
> >> Hi
> >>
> >>> On 9 Jun 2020, at 16:47, Julien Grall wrote:
> >>>
> >>>
> >>>
> >>> On 09/06/2020 16:28, Bertrand Ma
Hi Julien,
On 2020-06-09 18:32, Julien Grall wrote:
(+ Marc)
On 09/06/2020 18:03, Bertrand Marquis wrote:
Hi
On 9 Jun 2020, at 16:47, Julien Grall wrote:
On 09/06/2020 16:28, Bertrand Marquis wrote:
Hi,
On 9 Jun 2020, at 15:33, CodeWiz2280 wrote:
There does appear to be a secondary (
(+ Marc)
On 09/06/2020 18:03, Bertrand Marquis wrote:
Hi
On 9 Jun 2020, at 16:47, Julien Grall wrote:
On 09/06/2020 16:28, Bertrand Marquis wrote:
Hi,
On 9 Jun 2020, at 15:33, CodeWiz2280 wrote:
There does appear to be a secondary (CIC) controller that can forward
events to the GIC-400
> On 9 Jun 2020, at 16:58, CodeWiz2280 wrote:
>
> On Tue, Jun 9, 2020 at 11:47 AM Julien Grall wrote:
>>
>>
>>
>> On 09/06/2020 16:28, Bertrand Marquis wrote:
>>> Hi,
>>>
On 9 Jun 2020, at 15:33, CodeWiz2280 wrote:
There does appear to be a secondary (CIC) controller that
Hi
> On 9 Jun 2020, at 16:47, Julien Grall wrote:
>
>
>
> On 09/06/2020 16:28, Bertrand Marquis wrote:
>> Hi,
>>> On 9 Jun 2020, at 15:33, CodeWiz2280 wrote:
>>>
>>> There does appear to be a secondary (CIC) controller that can forward
>>> events to the GIC-400 and EDMA controllers for the k
On Tue, Jun 9, 2020 at 11:47 AM Julien Grall wrote:
>
>
>
> On 09/06/2020 16:28, Bertrand Marquis wrote:
> > Hi,
> >
> >> On 9 Jun 2020, at 15:33, CodeWiz2280 wrote:
> >>
> >> There does appear to be a secondary (CIC) controller that can forward
> >> events to the GIC-400 and EDMA controllers for
On 09/06/2020 16:28, Bertrand Marquis wrote:
Hi,
On 9 Jun 2020, at 15:33, CodeWiz2280 wrote:
There does appear to be a secondary (CIC) controller that can forward
events to the GIC-400 and EDMA controllers for the keystone 2 family.
Admittedly, i'm not sure how it is being used with regard
Hi,
> On 9 Jun 2020, at 15:33, CodeWiz2280 wrote:
>
> There does appear to be a secondary (CIC) controller that can forward
> events to the GIC-400 and EDMA controllers for the keystone 2 family.
> Admittedly, i'm not sure how it is being used with regards to the
> peripherals. I only see menti
There does appear to be a secondary (CIC) controller that can forward
events to the GIC-400 and EDMA controllers for the keystone 2 family.
Admittedly, i'm not sure how it is being used with regards to the
peripherals. I only see mention of the GIC-400 parent for the devices
in the device tree. M
On Mon, 8 Jun 2020, CodeWiz2280 wrote:
> It actually shows only 1 interrupt for any of the devices in that list
> (e.g. spi, ttyS0, ethernet) so you're probably right on the money with
> it being an interrupt acknowledge issue. Any help you can provide is
> greatly appreciated.
>
> On Mon, Jun
It actually shows only 1 interrupt for any of the devices in that list
(e.g. spi, ttyS0, ethernet) so you're probably right on the money with
it being an interrupt acknowledge issue. Any help you can provide is
greatly appreciated.
On Mon, Jun 8, 2020 at 4:40 AM Bertrand Marquis
wrote:
>
>
>
> >
> On 5 Jun 2020, at 20:12, CodeWiz2280 wrote:
>
> On Fri, Jun 5, 2020 at 11:05 AM CodeWiz2280 wrote:
>>
>> On Fri, Jun 5, 2020 at 8:47 AM Bertrand Marquis
>> wrote:
>>>
>>>
>>>
On 5 Jun 2020, at 13:42, CodeWiz2280 wrote:
On Fri, Jun 5, 2020 at 8:30 AM Julien Grall wrote
On Fri, Jun 5, 2020 at 11:05 AM CodeWiz2280 wrote:
>
> On Fri, Jun 5, 2020 at 8:47 AM Bertrand Marquis
> wrote:
> >
> >
> >
> > > On 5 Jun 2020, at 13:42, CodeWiz2280 wrote:
> > >
> > > On Fri, Jun 5, 2020 at 8:30 AM Julien Grall wrote:
> > >>
> > >> Hi,
> > >>
> > >> On 05/06/2020 13:25, CodeW
On Fri, Jun 5, 2020 at 8:47 AM Bertrand Marquis
wrote:
>
>
>
> > On 5 Jun 2020, at 13:42, CodeWiz2280 wrote:
> >
> > On Fri, Jun 5, 2020 at 8:30 AM Julien Grall wrote:
> >>
> >> Hi,
> >>
> >> On 05/06/2020 13:25, CodeWiz2280 wrote:
> >>> The Keystone uses the netcp driver, which has interrupts f
> On 5 Jun 2020, at 13:42, CodeWiz2280 wrote:
>
> On Fri, Jun 5, 2020 at 8:30 AM Julien Grall wrote:
>>
>> Hi,
>>
>> On 05/06/2020 13:25, CodeWiz2280 wrote:
>>> The Keystone uses the netcp driver, which has interrupts from 40-79
>>> listed in the device tree (arch/arm/boot/keystone-k2e-netc
On Fri, Jun 5, 2020 at 8:30 AM Julien Grall wrote:
>
> Hi,
>
> On 05/06/2020 13:25, CodeWiz2280 wrote:
> > The Keystone uses the netcp driver, which has interrupts from 40-79
> > listed in the device tree (arch/arm/boot/keystone-k2e-netcp.dtsi).
> > I'm using the same device tree between my non-xe
Hi,
On 05/06/2020 13:25, CodeWiz2280 wrote:
The Keystone uses the netcp driver, which has interrupts from 40-79
listed in the device tree (arch/arm/boot/keystone-k2e-netcp.dtsi).
I'm using the same device tree between my non-xen standalone kernel
and my dom0 kernel booted by xen. In the standal
On Fri, Jun 5, 2020 at 3:37 AM Bertrand Marquis
wrote:
>
> Hi,
>
> > On 5 Jun 2020, at 03:29, CodeWiz2280 wrote:
> >
> > On Thu, Jun 4, 2020 at 2:24 PM Julien Grall wrote:
> >>
> >> Hi,
> >>
> >> On 04/06/2020 13:07, CodeWiz2280 wrote:
> >>> On Thu, Jun 4, 2020 at 6:16 AM Julien Grall wrote:
>
Hi,
> On 5 Jun 2020, at 03:29, CodeWiz2280 wrote:
>
> On Thu, Jun 4, 2020 at 2:24 PM Julien Grall wrote:
>>
>> Hi,
>>
>> On 04/06/2020 13:07, CodeWiz2280 wrote:
>>> On Thu, Jun 4, 2020 at 6:16 AM Julien Grall wrote:
Hi,
On 04/06/2020 10:08, Bertrand Marquis wrote:
>
On Thu, Jun 4, 2020 at 2:24 PM Julien Grall wrote:
>
> Hi,
>
> On 04/06/2020 13:07, CodeWiz2280 wrote:
> > On Thu, Jun 4, 2020 at 6:16 AM Julien Grall wrote:
> >>
> >> Hi,
> >>
> >> On 04/06/2020 10:08, Bertrand Marquis wrote:
> >>> I would have thought that linux would have need some memory, eve
Hi,
On 04/06/2020 13:07, CodeWiz2280 wrote:
On Thu, Jun 4, 2020 at 6:16 AM Julien Grall wrote:
Hi,
On 04/06/2020 10:08, Bertrand Marquis wrote:
I would have thought that linux would have need some memory, even small in the
32bit space in order to boot.
Yes it needs some, but then they ar
On Thu, Jun 4, 2020 at 6:16 AM Julien Grall wrote:
>
> Hi,
>
> On 04/06/2020 10:08, Bertrand Marquis wrote:
> > I would have thought that linux would have need some memory, even small in
> > the 32bit space in order to boot.
>
> Yes it needs some, but then they are switching to use the high memor
Hi,
On 04/06/2020 10:08, Bertrand Marquis wrote:
I would have thought that linux would have need some memory, even small in the
32bit space in order to boot.
Yes it needs some, but then they are switching to use the high memory
alias after the MMU has been switch on.
From my understanding,
> On 4 Jun 2020, at 09:59, Julien Grall wrote:
>
>
>
> On 04/06/2020 09:02, Bertrand Marquis wrote:
>> Hi,
>
> Hi Bertrand,
>
>>> On 3 Jun 2020, at 19:09, Julien Grall wrote:
>>>
>>>
>>>
>>> On 03/06/2020 18:13, CodeWiz2280 wrote:
Hi Julien,
>>>
>>> Hello,
>>>
>>> In general, we
On 04/06/2020 09:02, Bertrand Marquis wrote:
Hi,
Hi Bertrand,
On 3 Jun 2020, at 19:09, Julien Grall wrote:
On 03/06/2020 18:13, CodeWiz2280 wrote:
Hi Julien,
Hello,
In general, we avoid top post on xen-devel, instead we reply inline. I believe
gmail should allow you to do it :).
Hi,
> On 3 Jun 2020, at 19:09, Julien Grall wrote:
>
>
>
> On 03/06/2020 18:13, CodeWiz2280 wrote:
>> Hi Julien,
>
> Hello,
>
> In general, we avoid top post on xen-devel, instead we reply inline. I
> believe gmail should allow you to do it :).
>
>> The offset is already applied to the mem
On Wed, Jun 3, 2020 at 2:09 PM Julien Grall wrote:
>
>
>
> On 03/06/2020 18:13, CodeWiz2280 wrote:
> > Hi Julien,
>
> Hello,
>
> In general, we avoid top post on xen-devel, instead we reply inline. I
> believe gmail should allow you to do it :).
>
I'm sorry about that. Hopefully this looks right
On 03/06/2020 18:13, CodeWiz2280 wrote:
Hi Julien,
Hello,
In general, we avoid top post on xen-devel, instead we reply inline. I
believe gmail should allow you to do it :).
The offset is already applied to the memory nodes in the device tree,
meaning a direct Linux boot from uboot wou
Hi Julien,
The offset is already applied to the memory nodes in the device tree,
meaning a direct Linux boot from uboot would have only the 36-bit addresses
in the device tree (0x8__ and 0x8_8000_). Linux would start
executing from a 32-bit address space however and then switch over t
(+Bertrand and Stefano)
On 01/06/2020 18:38, CodeWiz2280 wrote:
Hi Julien,
Hi Dave,
As requested please see log below from the eval board booting dom0, some
notes are as follows:
Thanks for the logs and the notes. They are useful to understand your issue.
1. The offset that gets applied
Hi Julien,
As requested please see log below from the eval board booting dom0, some
notes are as follows:
1. The offset that gets applied to the 32-bit address to translate it
to 36-bits is 0x7_8000_
2. Uboot has been setup to not change the address of the memory in the
device tree prior to l
Hi Julien,
Thank you for your response. I will try and post a log for you. I have
been switching back and forth between configurations and need to take a new
one.
The board has 4GB of memory. Uboot places the kernel/initramfs/dtb in the
0x8000_ region but then the kernel switches its code/d
Hello,
I have a few questions in order to understand a bit more your problem.
On 01/06/2020 13:38, CodeWiz2280 wrote:
Hello, I am using a Texas Instruments K2E Keystone Eval board with Linux
4.19.59. It has a 32-bit ARM Cortex A15 processor. There is keystone
specific code in the kernel in ar
To Whom it May Concern:
Hello, I am using a Texas Instruments K2E Keystone Eval board with Linux
4.19.59. It has a 32-bit ARM Cortex A15 processor. There is keystone
specific code in the kernel in arch/arm/mm/pv-fixup-asm.s that executes
during early_paging_init for LPAE support. This causes the
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