Re: [PATCH 1/3] amd-vi: use the same IOMMU page table levels for PV and HVM

2023-11-20 Thread Jan Beulich
On 20.11.2023 13:01, Roger Pau Monné wrote: > On Mon, Nov 20, 2023 at 12:34:45PM +0100, Jan Beulich wrote: >> Yet still this would then feel like an issue with the last patch alone, >> which the change here is merely avoiding (without this being a strict >> prereq). Instead I'd expect us to use 4 l

Re: [PATCH 1/3] amd-vi: use the same IOMMU page table levels for PV and HVM

2023-11-20 Thread Roger Pau Monné
On Mon, Nov 20, 2023 at 12:34:45PM +0100, Jan Beulich wrote: > On 20.11.2023 11:50, Roger Pau Monné wrote: > > On Mon, Nov 20, 2023 at 11:37:43AM +0100, Jan Beulich wrote: > >> On 20.11.2023 11:27, Roger Pau Monné wrote: > >>> On Mon, Nov 20, 2023 at 10:45:29AM +0100, Jan Beulich wrote: > On 1

Re: [PATCH 1/3] amd-vi: use the same IOMMU page table levels for PV and HVM

2023-11-20 Thread Jan Beulich
On 20.11.2023 11:50, Roger Pau Monné wrote: > On Mon, Nov 20, 2023 at 11:37:43AM +0100, Jan Beulich wrote: >> On 20.11.2023 11:27, Roger Pau Monné wrote: >>> On Mon, Nov 20, 2023 at 10:45:29AM +0100, Jan Beulich wrote: On 17.11.2023 12:55, Andrew Cooper wrote: > On 17/11/2023 9:47 am, Roge

Re: [PATCH 1/3] amd-vi: use the same IOMMU page table levels for PV and HVM

2023-11-20 Thread Roger Pau Monné
On Mon, Nov 20, 2023 at 11:37:43AM +0100, Jan Beulich wrote: > On 20.11.2023 11:27, Roger Pau Monné wrote: > > On Mon, Nov 20, 2023 at 10:45:29AM +0100, Jan Beulich wrote: > >> On 17.11.2023 12:55, Andrew Cooper wrote: > >>> On 17/11/2023 9:47 am, Roger Pau Monne wrote: > /* > -

Re: [PATCH 1/3] amd-vi: use the same IOMMU page table levels for PV and HVM

2023-11-20 Thread Jan Beulich
On 20.11.2023 11:27, Roger Pau Monné wrote: > On Mon, Nov 20, 2023 at 10:45:29AM +0100, Jan Beulich wrote: >> On 17.11.2023 12:55, Andrew Cooper wrote: >>> On 17/11/2023 9:47 am, Roger Pau Monne wrote: /* - * Choose the number of levels for the IOMMU page tables. - * - P

Re: [PATCH 1/3] amd-vi: use the same IOMMU page table levels for PV and HVM

2023-11-20 Thread Roger Pau Monné
On Mon, Nov 20, 2023 at 10:45:29AM +0100, Jan Beulich wrote: > On 17.11.2023 12:55, Andrew Cooper wrote: > > On 17/11/2023 9:47 am, Roger Pau Monne wrote: > >> Using different page table levels for HVM or PV guest is not helpful, and > >> is > >> not inline with the IOMMU implementation used by th

Re: [PATCH 1/3] amd-vi: use the same IOMMU page table levels for PV and HVM

2023-11-20 Thread Jan Beulich
On 17.11.2023 12:55, Andrew Cooper wrote: > On 17/11/2023 9:47 am, Roger Pau Monne wrote: >> Using different page table levels for HVM or PV guest is not helpful, and is >> not inline with the IOMMU implementation used by the other architecture >> vendor >> (VT-d). >> >> Switch to uniformly use DE

Re: [PATCH 1/3] amd-vi: use the same IOMMU page table levels for PV and HVM

2023-11-17 Thread Andrew Cooper
On 17/11/2023 9:47 am, Roger Pau Monne wrote: > Using different page table levels for HVM or PV guest is not helpful, and is > not inline with the IOMMU implementation used by the other architecture vendor > (VT-d). > > Switch to uniformly use DEFAULT_DOMAIN_ADDRESS_WIDTH in order to set the > AMD

[PATCH 1/3] amd-vi: use the same IOMMU page table levels for PV and HVM

2023-11-17 Thread Roger Pau Monne
Using different page table levels for HVM or PV guest is not helpful, and is not inline with the IOMMU implementation used by the other architecture vendor (VT-d). Switch to uniformly use DEFAULT_DOMAIN_ADDRESS_WIDTH in order to set the AMD-Vi page table levels. Note using the max RAM address for