On 20.11.2023 13:01, Roger Pau Monné wrote: > On Mon, Nov 20, 2023 at 12:34:45PM +0100, Jan Beulich wrote: >> Yet still this would then feel like an issue with the last patch alone, >> which the change here is merely avoiding (without this being a strict >> prereq). Instead I'd expect us to use 4 levels whenever there are any >> kind of regions (reserved or not) above 512G. Without disallowing use >> of 3 levels on other (smaller) systems. > > While reserved regions are the ones that made me realize about this > IOMMU page table difference, what about device MMIO regions? > > There's no limitation that avoids MMIO regions from living past the > last RAM address, and possibly above the 512GB mark. > > If anything for PV we should limit page table levels based on the > supported paddr bits reported by the CPU, but limiting it based on the > memory map seems plain bogus.
Right, matches what we were discussing (really it's the paddr_bits reported to the domain, but I guess we have little reason to alter the host value especially for Dom0). Jan
