On 20.06.2023 22:44, Stefano Stabellini wrote:
> On Tue, 20 Jun 2023, Jan Beulich wrote:
>> On 20.06.2023 12:34, Simone Ballarin wrote:
>>> From: Gianluca Luparini
>>>
>>> The xen sources contains violations of MISRA C:2012 Rule 7.2 whose headline
>>> states:
>>> "A "u" or "U" suffix shall be app
flight 181527 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/181527/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-armhf broken
build-armhf
flight 181526 qemu-mainline real [real]
http://logs.test-lab.xenproject.org/osstest/logs/181526/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-armhf broken
build-armhf 4 host-ins
flight 181520 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/181520/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-armhf broken
build-armhf
From: Stefano Stabellini
Signed-off-by: Stefano Stabellini
---
docs/misra/rules.rst | 16
1 file changed, 16 insertions(+)
diff --git a/docs/misra/rules.rst b/docs/misra/rules.rst
index 11b9c42b70..9caf43968c 100644
--- a/docs/misra/rules.rst
+++ b/docs/misra/rules.rst
@@ -213
On Tue, 20 Jun 2023, Andrew Cooper wrote:
> In particular, the libxg wrapper for unxz.c uses char for bool_t which is a
> major antipattern. Luckily the code doesn't suffer from truncated values.
>
> No functional change.
>
> Signed-off-by: Andrew Cooper
FYI I checked patchew and it took the p
On Mon, Jun 12, 2023 at 10:09:39AM +0200, Roger Pau Monné wrote:
> On Fri, Jun 09, 2023 at 12:55:39PM -0400, Demi Marie Obenour wrote:
> > On Fri, Jun 09, 2023 at 05:13:45PM +0200, Roger Pau Monné wrote:
> > > On Thu, Jun 08, 2023 at 11:33:26AM -0400, Demi Marie Obenour wrote:
> > > > On Thu, Jun 0
On Tue, Jun 20, 2023 at 4:07 AM Andrew Cooper wrote:
>
> These aren't used, and are not obvious useful either.
>
> tools/ does have some logic which works on $(XEN_OS) directly, and some on
> CONFIG_$(XEN_OS) too, but this isn't how we typically refer to things.
>
> The only user ever of this sche
On Tue, Jun 20, 2023 at 4:05 PM Jason Gunthorpe wrote:
>
> On Tue, Jun 20, 2023 at 01:01:39PM -0700, Vishal Moola wrote:
> > On Fri, Jun 16, 2023 at 5:38 AM Jason Gunthorpe wrote:
> > >
> > > On Mon, Jun 12, 2023 at 02:03:53PM -0700, Vishal Moola (Oracle) wrote:
> > > > Currently, page table info
On Tue, Jun 20, 2023 at 01:01:39PM -0700, Vishal Moola wrote:
> On Fri, Jun 16, 2023 at 5:38 AM Jason Gunthorpe wrote:
> >
> > On Mon, Jun 12, 2023 at 02:03:53PM -0700, Vishal Moola (Oracle) wrote:
> > > Currently, page table information is stored within struct page. As part
> > > of simplifying s
On 20/06/2023 10:27 pm, Timothy Pearson wrote:
>> On 20/06/2023 7:12 pm, Shawn Anastasio wrote:
>>> diff --git a/xen/arch/ppc/xen.lds.S b/xen/arch/ppc/xen.lds.S
>>> new file mode 100644
>>> index 00..f75d9be4ed
>>> --- /dev/null
>>> +++ b/xen/arch/ppc/xen.lds.S
>>>
>>> +/**
>>> + * OF's ba
- Original Message -
> From: "Andrew Cooper"
> To: "Shawn Anastasio" ,
> xen-devel@lists.xenproject.org
> Cc: "Timothy Pearson" , "George Dunlap"
> , "Jan Beulich"
> , "Julien Grall" , "Stefano Stabellini"
> , "Wei Liu"
>
> Sent: Tuesday, June 20, 2023 4:21:22 PM
> Subject: Re: [PAT
On Mon, 19 Jun 2023, Andrew Cooper wrote:
> These aren't used, and are not obvious useful either.
>
> tools/ does have some logic which works on $(XEN_OS) directly, and some on
> CONFIG_$(XEN_OS) too, but this isn't how we typically refer to things.
>
> The only user ever of this scheme was intro
On Tue, 20 Jun 2023, Simone Ballarin wrote:
> From: Gianluca Luparini
>
> The xen sources contains violations of MISRA C:2012 Rule 7.2 whose headline
> states:
> "A "u" or "U" suffix shall be applied to all integer constants that are
> represented in an unsigned type".
>
> I propose to use "U"
On 20/06/2023 7:12 pm, Shawn Anastasio wrote:
> diff --git a/xen/arch/ppc/xen.lds.S b/xen/arch/ppc/xen.lds.S
> new file mode 100644
> index 00..f75d9be4ed
> --- /dev/null
> +++ b/xen/arch/ppc/xen.lds.S
>
> +/**
> + * OF's base load address is 0x40 (XEN_VIRT_START).
> + * By defining se
On Tue, 20 Jun 2023, Simone Ballarin wrote:
> From: Gianluca Luparini
>
> The xen sources contains violations of MISRA C:2012 Rule 7.2 whose headline
> states:
> "A "u" or "U" suffix shall be applied to all integer constants that are
> represented in an unsigned type".
>
> I propose to use "U"
On Tue, 20 Jun 2023, Simone Ballarin wrote:
> From: Gianluca Luparini
>
> The xen sources contains violations of MISRA C:2012 Rule 7.2 whose headline
> states:
> "A "u" or "U" suffix shall be applied to all integer constants that are
> represented in an unsigned type".
>
> I propose to use "U"
On Tue, 20 Jun 2023, Jan Beulich wrote:
> On 20.06.2023 12:35, Simone Ballarin wrote:
> > --- a/xen/include/public/io/ring.h
> > +++ b/xen/include/public/io/ring.h
> > @@ -36,11 +36,11 @@
> > typedef unsigned int RING_IDX;
> >
> > /* Round a 32-bit unsigned constant down to the nearest power of
On Tue, 20 Jun 2023, Simone Ballarin wrote:
> From: Gianluca Luparini
>
> The xen sources contains violations of MISRA C:2012 Rule 7.2 whose headline
> states:
> "A "u" or "U" suffix shall be applied to all integer constants that are
> represented in an unsigned type".
>
> I propose to use "U"
On Tue, 20 Jun 2023, Simone Ballarin wrote:
> From: Gianluca Luparini
>
> The xen sources contains violations of MISRA C:2012 Rule 7.2 whose headline
> states:
> "A "u" or "U" suffix shall be applied to all integer constants that are
> represented in an unsigned type".
>
> I propose to use "U"
On Tue, 20 Jun 2023, Jan Beulich wrote:
> On 20.06.2023 12:34, Simone Ballarin wrote:
> > From: Gianluca Luparini
> >
> > The xen sources contains violations of MISRA C:2012 Rule 7.2 whose headline
> > states:
> > "A "u" or "U" suffix shall be applied to all integer constants that are
> > repre
On Tue, 20 Jun 2023, Simone Ballarin wrote:
> From: Gianluca Luparini
>
> The xen sources contains violations of MISRA C:2012 Rule 7.2 whose headline
> states:
> "A "u" or "U" suffix shall be applied to all integer constants that are
> represented in an unsigned type".
>
> I propose to use "U"
On Tue, 20 Jun 2023, Simone Ballarin wrote:
> From: Gianluca Luparini
>
> The xen sources contains violations of MISRA C:2012 Rule 7.2 whose headline
> states:
> "A "u" or "U" suffix shall be applied to all integer constants that are
> represented in an unsigned type".
>
> I propose to use "U"
On Tue, 20 Jun 2023, Jan Beulich wrote:
> On 20.06.2023 12:34, Simone Ballarin wrote:
> > From: Gianluca Luparini
> >
> > The xen sources contains violations of MISRA C:2012 Rule 7.2 whose headline
> > states:
> > "A "u" or "U" suffix shall be applied to all integer constants that are
> > repre
flight 181523 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/181523/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-armhf broken
build-armhf
Hi Ayan,
On 20/06/2023 19:28, Ayan Kumar Halder wrote:
On 20/06/2023 17:41, Julien Grall wrote:
Hi,
Hi Julien,
On 20/06/2023 16:17, Ayan Kumar Halder wrote:
Add a special configuration (CONFIG_AARCH32_V8R) to setup the Cortex-R52
specifics.
Cortex-R52 is an Arm-V8R AArch32 processor.
Ref
On Tue, 20 Jun 2023, Luca Fancellu wrote:
> > On 20 Jun 2023, at 13:39, Jan Beulich wrote:
> >
> > On 20.06.2023 12:34, Simone Ballarin wrote:
> >> --- a/xen/drivers/passthrough/amd/iommu-defs.h
> >> +++ b/xen/drivers/passthrough/amd/iommu-defs.h
> >> @@ -38,49 +38,49 @@
> >> ((uint64_t)(
On Tue, 20 Jun 2023, Jan Beulich wrote:
> On 20.06.2023 14:10, Roberto Bagnara wrote:
> > + * - Non-standard tokens
> > + - ARM64, X86_64
> > + - _Static_assert:
> > + see Section "2.1 C Language" of GCC_MANUAL.
> > + asm, __asm__:
> > + see Sections "6.48 Alternat
On Tue, 20 Jun 2023, Roberto Bagnara wrote:
> This document specifies the C language dialect used by Xen and
> the assumptions Xen makes on the translation toolchain.
>
> Signed-off-by: Roberto Bagnara
Hi Roberto,
This version of the document is a lot better! I don't have any further
comments b
On 6/13/23 06:32, Volodymyr Babchuk wrote:
...
> diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
> index 652807a4a4..1270174e78 100644
> --- a/xen/drivers/vpci/vpci.c
> +++ b/xen/drivers/vpci/vpci.c
> @@ -38,20 +38,32 @@ extern vpci_register_init_t *const __end_vpci_array[];
>
>
> On 20 Jun 2023, at 13:39, Jan Beulich wrote:
>
> On 20.06.2023 12:34, Simone Ballarin wrote:
>> --- a/xen/drivers/passthrough/amd/iommu-defs.h
>> +++ b/xen/drivers/passthrough/amd/iommu-defs.h
>> @@ -38,49 +38,49 @@
>> ((uint64_t)(offset) << (12 + (PTE_PER_TABLE_SHIFT * ((level) - 1))
flight 181516 qemu-mainline real [real]
http://logs.test-lab.xenproject.org/osstest/logs/181516/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-armhf broken
build-armhf 4 host-ins
On Fri, Jun 16, 2023 at 5:38 AM Jason Gunthorpe wrote:
>
> On Mon, Jun 12, 2023 at 02:03:53PM -0700, Vishal Moola (Oracle) wrote:
> > Currently, page table information is stored within struct page. As part
> > of simplifying struct page, create struct ptdesc for page table
> > information.
> >
> >
> On 20 Jun 2023, at 14:59, Simone Ballarin wrote:
>
> Hi,
>
> Il giorno mar 20 giu 2023 alle ore 15:20 Jan Beulich ha
> scritto:
> On 20.06.2023 12:35, Simone Ballarin wrote:
> > --- a/xen/common/gunzip.c
> > +++ b/xen/common/gunzip.c
> > @@ -11,7 +11,7 @@ static unsigned char *__initdata
flight 181515 linux-5.4 real [real]
http://logs.test-lab.xenproject.org/osstest/logs/181515/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-armhf broken
build-armhf
On Mon, Jun 19, 2023 at 10:24 AM Jan Beulich wrote:
>
> On 14.06.2023 20:02, Jason Andryuk wrote:
> > --- a/xen/arch/x86/acpi/cpufreq/hwp.c
> > +++ b/xen/arch/x86/acpi/cpufreq/hwp.c
> > @@ -537,6 +537,29 @@ static const struct cpufreq_driver __initconstrel
> > hwp_cpufreq_driver =
> > .updat
On 20/06/2023 17:41, Julien Grall wrote:
Hi,
Hi Julien,
On 20/06/2023 16:17, Ayan Kumar Halder wrote:
Add a special configuration (CONFIG_AARCH32_V8R) to setup the Cortex-R52
specifics.
Cortex-R52 is an Arm-V8R AArch32 processor.
Refer ARM DDI 0487I.a ID081822, G8-9647, G8.2.112 MIDR,
bit
On Mon, Jun 19, 2023 at 7:38 AM Jan Beulich wrote:
>
> On 14.06.2023 20:02, Jason Andryuk wrote:
> > Falling back from cpufreq=hwp to cpufreq=xen is a more user-friendly
> > choice than disabling cpufreq when HWP is not available. Specifying
> > cpufreq=hwp indicates the user wants cpufreq, so, i
Signed-off-by: Shawn Anastasio
---
MAINTAINERS | 4
1 file changed, 4 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7a07949e1d..64c9cc89ed 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -458,6 +458,10 @@ X: xen/arch/x86/acpi/lib.c
F: xen/drivers/cpufreq/
F: xen/include
Hello all,
This patch series adds support for building a minimal image
for Power ISA 2.07B+ (POWER8+) systems. In addition to a patch adding
support to the build system and a simple infinite loop at the
entrypoint, patches to add ppc64le support to the CI as well as a
MAINTAINERS update are includ
Add the build system changes required to build for ppc64le (POWER8+).
As of now the resulting image simply boots to an infinite loop.
$ make XEN_TARGET_ARCH=ppc64 -C xen build
This port targets POWER8+ CPUs running in Little Endian mode specifically,
and does not boot on older machines. Additiona
Add build jobs to cross-compile Xen for ppc64le.
Signed-off-by: Shawn Anastasio
Acked-by: Stefano Stabellini
Acked-by: Andrew Cooper
---
automation/gitlab-ci/build.yaml | 60 +
1 file changed, 60 insertions(+)
diff --git a/automation/gitlab-ci/build.yaml b/auto
From: David Woodhouse
Coverity was unhappy (CID 1508359) because we didn't check the return of
init_walk_op() in transaction_commit(), despite doing so at every other
call site.
Strictly speaking, this is a false positive since it can never fail. It
only fails for invalid user input (transaction
In particular, the libxg wrapper for unxz.c uses char for bool_t which is a
major antipattern. Luckily the code doesn't suffer from truncated values.
No functional change.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Roger Pau Monné
CC: Wei Liu
CC: Stefano Stabellini
CC: Julien Gral
Hello,
I just came across this discussion regarding s3/s4 support in virtio-gpu
driver and QEMU.
We saw similar problem a while ago (QEMU deletes all objects upon
suspension) and
came up with an experimental solution that is basically making
virtio-gpu driver to do object creation
for al
On Tue, 2023-06-20 at 13:19 +0100, Peter Maydell wrote:
> On Fri, 2 Jun 2023 at 18:06, Peter Maydell
> wrote:
> >
> > On Tue, 2 May 2023 at 18:08, Peter Maydell
> > wrote:
> > >
> > > On Tue, 7 Mar 2023 at 18:27, David Woodhouse
> > > wrote:
> > > >
> > > > From: David Woodhouse
>
> > > Hi;
This option is particularly dubious as Xen does not use Protection Keys, owing
to the sharing of pagetables with PV guests. All this option does is hide PKU
by default from HVM guests, and is therefore redundant with the more generic
cpuid=no-pku.
The variable ought to be in __initdata given it's
This should be static, and there's no need for a separate (non-init, even)
function to perform a simple equality test. Drop the is_ prefix which is
gramatically questionable, and make it __ro_after_init.
Leave a TODO, because the behaviour is definitely wrong to be applied to ~all
modern Intel CP
This will unplug the ahci device when the Xen driver calls for an unplug.
This has been tested to work in linux and Windows guests.
When q35 is detected, we will remove the ahci controller
with the hard disks. In the libxl config, cdrom devices
are put on a seperate ahci controller. This allows fo
Virtual Channel/MFVC capabilities are relatively useless for emulation
(passing through accesses to them should be enough in most cases) yet they
have hardest format of all PCIe Extended Capabilities, mostly because
VC capability format allows the sparse config space layout with gaps
between the pa
Add few more PCIe Extended Capabilities entries to the
xen_pt_emu_reg_grps[] array along with their corresponding *_size_init()
functions.
All these capabilities have non-fixed size but their size calculation
is very simple, hence adding them in a single batch.
For every capability register group
Unlike other PCIe Extended Capabilities, we currently cannot allow attempts
to use Resizable BAR Capability. Without specifically handling BAR resizing
we're likely end up with corrupted MMIO hole layout if guest OS will
attempt to use this feature. Actually, recent Windows versions started
to unde
Some PCIe capabilities needed to be faked for the xen implementation to work.
This is the situation when we were asked to hide (aka
"hardwire to 0") some PCIe ext capability, but it was located
at offset 0x100 in PCIe config space. In this case we can't
simply exclude it from the linked list of ca
The patch provides Advanced Error Reporting PCIe Extended Capability
description structure and corresponding capability sizing function.
Signed-off-by: Alexey Gerasimenko
Signed-off-by: Joel Upham
---
hw/xen/xen_pt_config_init.c | 72 +
1 file changed, 72 ins
The patch provides Vendor-specific PCIe Extended Capability description
structure and corresponding sizing function. In this particular case the
size of the Vendor capability is available in the VSEC Length field.
Signed-off-by: Alexey Gerasimenko
Signed-off-by: Joel Upham
---
hw/xen/xen_pt_con
This adds description structures for all fixed-size PCIe Extended
Capabilities.
For every capability register group, only 2 registers are emulated
currently: Capability ID (16 bit) and Next Capability Offset/Version (16
bit). Both needed to implement selective capability hiding. All other
register
We need to hide some unwanted PCI/PCIe capabilities for passed through
devices.
Normally we do this by marking the capability register group
as XEN_PT_GRP_TYPE_HARDWIRED which exclude this capability from the
capability list and returns zeroes on attempts to read capability body.
Skipping the capab
The patch adds new xen_pt_ext_cap_ptr_reg_init function which is used
to initialize the emulated next pcie extended capability pointer.
Primary mission of this function is to have a method to selectively hide
some extended capabilities from the capability linked list, skipping them
by altering the
This patch provides basic facilities for PCIe Extended Capabilities and
support for controlled (via s->pcie_enabled_dev flag) access to PCIe
config space (>256).
PCIe Extended Capabilities make use of 16-bit capability ID. Also,
a capability size might exceed 8-bit width. So as the very first step
Compared to legacy i440 system, there are certain difficulties while
passing through PCIe devices to guest OSes like Windows 7 and above
on platforms with native support of PCIe bus (in our case Q35). This
problem is not applicable to older OSes like Windows XP -- PCIe
passthrough on such OSes can
Even if we have some real PCIe device being passed through to a guest,
there are situations when we cannot use its PCIe features, primarily
allowing to access extended (>256) config space.
Basically, we can allow reading PCIe extended config space only if both
the device and emulated system are PC
xen_pt_config_init.c reads Device/Port Type and Capability version fields
in many places. Two functions are used for this purpose:
get_capability_version and get_device_type. These functions perform PCI
conf space reading every time they're called. Another bad thing is that
these functions know not
This patch introduces 2 new functions,
- xen_host_pci_find_next_ext_cap (actually a reworked
xen_host_pci_find_ext_cap_offset function which is unused)
- xen_host_pci_find_next_cap
These functions allow to search for PCI/PCIe capabilities in a uniform
way. Both functions allow to search either a
---
hw/acpi/ich9.c| 22 +-
hw/acpi/pcihp.c |6 +-
hw/core/machine.c | 19 +
hw/i386/pc_piix.c |3 +-
hw/i386/pc_q35.c | 39 +-
hw/i386/xen/xen-hvm.c |7 +-
hw/i386/xen/xen_platform.c| 19 +-
hw/isa/l
The primary difference in PCI device IRQ management between Xen HVM and
QEMU is that Xen PCI IRQs are "device-centric" while QEMU PCI IRQs are
"chipset-centric". Namely, Xen uses PCI device BDF and INTx as coordinates
to assert IRQ while QEMU finds out to which chipset PIRQ the IRQ is routed
throug
This patch extends hvmloader_acpi_build_tables() with code which detects
if MMCONFIG is available -- i.e. initialized and enabled (+we're running
on Q35), obtains its base address and size and asks libacpi to build MCFG
table for it via setting the flag ACPI_HAS_MCFG in a manner similar
to other op
Much like normal PCI BARs or other chipset-specific memory-mapped
resources, MMCONFIG area needs space in MMIO hole, so we must allocate
it manually.
The actual MMCONFIG size depends on a number of PCI buses available which
should be covered by ECAM. Possible options are 64MB, 128MB and 256MB.
As
This patch adds support to allow for 6 emulated devices on a
controller, and handling cdrom drives properly. This is not from the
original patch series.
Signed-off-by: Joel Upham
---
tools/libs/light/libxl_dm.c | 40 -
1 file changed, 31 insertions(+), 9 delet
Provide a new domain config option to select the emulated machine type,
device_model_machine. It has following possible values:
- "i440" - i440 emulation (default)
- "q35" - emulate a Q35 machine. By default, the storage interface is AHCI.
Note that omitting device_model_machine parameter means i4
This adds construct_mcfg() function to libacpi which allows to build MCFG
table for a given mmconfig_addr/mmconfig_len pair if the ACPI_HAS_MCFG
flag was specified in acpi_config struct.
The maximum bus number is calculated from mmconfig_len using
MCFG_SIZE_TO_NUM_BUSES macro (1MByte of MMIO space
This patch adds description for 'device_model_machine' option which allows
to control which chipset will be emulated by device model.
Signed-off-by: Alexey Gerasimenko
Signed-off-by: Joel Upham
---
docs/man/xl.cfg.5.pod.in | 27 +++
1 file changed, 27 insertions(+)
diff
This adds a new function get_pc_machine_type() which allows to determine
the emulated chipset type. Supported return values:
- MACHINE_TYPE_I440
- MACHINE_TYPE_Q35
- MACHINE_TYPE_UNKNOWN, results in the error message being printed
followed by calling BUG() in hvmloader.
Signed-off-by: Alexey Ge
This patch does following:
1. Move PCI-device specific initialization out of pci_setup function
to the newly created class_specific_pci_device_setup function to simplify
code.
2. PCI-device specific initialization extended with LPC controller
initialization
3. Initialize PIRQA...{PIRQD, PIRQH} r
This patch adds the DSDT table for Q35 (new tools/libacpi/dsdt_q35.asl
file). There are not many differences with dsdt.asl (for i440) at the
moment, namely:
- BDF location of LPC Controller
- Minor changes related to FDC detection
- Addition of _OSC method to inform OSPM about PCIe features suppor
Allows to select Q35 DSDT table in hvmloader_acpi_build_tables(). Function
get_pc_machine_type() is used to select a proper table (i440/q35).
As we are bound to the qemu-xen device model for Q35, no need
to initialize config->dsdt_15cpu/config->dsdt_15cpu_len fields.
Added the seabios/ovmf loadin
In order to turn on ACPI for OS, we need to write a chipset-specific value
to SMI_CMD register (sort of imitation of the APM->ACPI switch on real
systems). Modify acpi_enable_sci() function to support both i440 and Q35
emulation.
Signed-off-by: Alexey Gerasimenko
Signed-off-by: Joel Upham
---
t
Provide building for newly added dsdt_q35.asl file, in a way similar
to dsdt.asl.
Note that '15cpu' ACPI tables are only applicable to qemu-traditional
(which have no support for Q35), so we need to use 'anycpu' version only.
Signed-off-by: Alexey Gerasimenko
Signed-off-by: Joel Upham
---
tool
Q35 support using Qemu's device emulation. I based the patches from 2017
found on the mailing list here:
https://lists.xenproject.org/archives/html/xen-devel/2018-03/msg01176.html
I have been using a version of these patches on Xen 4.16 with Qemu
version 4.1 for over 6 months. The guest VMs are
Hi,
On 20/06/2023 16:17, Ayan Kumar Halder wrote:
Add a special configuration (CONFIG_AARCH32_V8R) to setup the Cortex-R52
specifics.
Cortex-R52 is an Arm-V8R AArch32 processor.
Refer ARM DDI 0487I.a ID081822, G8-9647, G8.2.112 MIDR,
bits[31:24] = 0x41 , Arm Ltd
bits[23:20] = Implementation de
On 16/06/2023 2:10 pm, Roger Pau Monne wrote:
> Hello,
>
> The following series adds support for handling guest MSR features as
> defined in arch-x86/cpufeatureset.h.
>
> The end result is the user being able to use such features with the
> xl.cfg(5) cpuid option. This also involves adding support
flight 181513 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/181513/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-armhf broken
build-armhf
From: Oleksandr Andrushchenko
VPCI is disabled on ARM. Make it depend on CONFIG_HAS_VPCI to test the PCI
passthrough support.
While here, remove the comment on the preceding line.
Signed-off-by: Oleksandr Andrushchenko
Signed-off-by: Rahul Singh
Signed-off-by: Stewart Hildebrand
---
There ar
From: Rahul Singh
Setting CONFIG_PCI_PASSTHROUGH=y will enable PCI passthrough on ARM, even though
the feature is not yet complete in the current upstream codebase. The purpose of
this is to make it easier to enable the necessary configs (HAS_PCI, HAS_VPCI)
for
testing and development of PCI pas
On 6/20/23 5:15 AM, Jan Beulich wrote:
> On 16.06.2023 19:48, Shawn Anastasio wrote:
>> --- /dev/null
>> +++ b/xen/arch/ppc/Kconfig
>> @@ -0,0 +1,42 @@
>> +config PPC
>> +def_bool y
>> +
>> +config PPC64
>> +def_bool y
>> +select 64BIT
>> +
>> +config ARCH_DEFCONFIG
>> +string
>> +
Add a special configuration (CONFIG_AARCH32_V8R) to setup the Cortex-R52
specifics.
Cortex-R52 is an Arm-V8R AArch32 processor.
Refer ARM DDI 0487I.a ID081822, G8-9647, G8.2.112 MIDR,
bits[31:24] = 0x41 , Arm Ltd
bits[23:20] = Implementation defined
bits[19:16] = 0xf , Arch features are individua
On 20.06.2023 14:10, Roberto Bagnara wrote:
> + * - Token pasting of ',' and __VA_ARGS__
> + - ARM64, X86_64
> + - See Section "6.21 Macros with a Variable Number of Arguments" of
> GCC_MANUAL.
> +
> + * - No arguments for '...' parameter of variadic macro
> + - ARM64, X86_64
> +
On 20.06.2023 14:10, Roberto Bagnara wrote:
> + * - Arithmetic operator on void type
> + - ARM64, X86_64
> + - See Section "6.24 Arithmetic on void- and Function-Pointers" of
> GCC_MANUAL."
The first line is misleading - we don't (and can't) do arithmetic on void.
What we do is arithmet
On 20.06.2023 14:10, Roberto Bagnara wrote:
> + * - Non-standard tokens
> + - ARM64, X86_64
> + - _Static_assert:
> + see Section "2.1 C Language" of GCC_MANUAL.
> + asm, __asm__:
> + see Sections "6.48 Alternate Keywords" and "6.47 How to Use Inline
> Assembly La
On 16.06.2023 15:10, Roger Pau Monne wrote:
> @@ -119,6 +103,21 @@ int x86_msr_copy_from_buffer(struct cpu_policy *p,
> return rc;
> }
>
> +const uint64_t *x86_msr_get_entry_const(const struct cpu_policy *p,
> +uint32_t idx)
I don't think idx needs t
Hi,
Il giorno mar 20 giu 2023 alle ore 15:20 Jan Beulich ha
scritto:
> On 20.06.2023 12:35, Simone Ballarin wrote:
> > --- a/xen/common/gunzip.c
> > +++ b/xen/common/gunzip.c
> > @@ -11,7 +11,7 @@ static unsigned char *__initdata window;
> > static memptr __initdata free_mem_ptr;
> > static me
Hi,
On 19/06/23 12:29, Julien Grall wrote:
Hi,
On 19/06/2023 11:25, Jan Beulich wrote:
On 19.06.2023 12:01, Julien Grall wrote:
On 19/06/2023 10:56, Nicola Vetrini wrote:
In the files `xen/arch/arm/include/asm/arm(32|64)/flushtlb.h' there
are a
few occurrences of nested '//' character sequen
On Tue, Jun 20, 2023 at 12:02:46PM +, osstest service owner wrote:
> flight 181514 xen-unstable-smoke real [real]
> http://logs.test-lab.xenproject.org/osstest/logs/181514/
>
> Failures and problems with tests :-(
>
> Tests which did not succeed and are blocking,
> including tests which could
Hi,
Il giorno mar 20 giu 2023 alle ore 13:03 Julien Grall ha
scritto:
> Hi,
>
> On 20/06/2023 11:34, Simone Ballarin wrote:
> > From: Gianluca Luparini
>
> Is this person the original author of this patch? If so...
>
> >
> > The xen sources contains violations of MISRA C:2012 Rule 7.2 whose
> h
On 20.06.2023 12:35, Simone Ballarin wrote:
> --- a/xen/common/gunzip.c
> +++ b/xen/common/gunzip.c
> @@ -11,7 +11,7 @@ static unsigned char *__initdata window;
> static memptr __initdata free_mem_ptr;
> static memptr __initdata free_mem_end_ptr;
>
> -#define WSIZE 0x8000
> +#defi
On 20.06.2023 12:35, Simone Ballarin wrote:
> --- a/xen/arch/x86/apic.c
> +++ b/xen/arch/x86/apic.c
> @@ -1211,7 +1211,7 @@ static void __init calibrate_APIC_clock(void)
> * Setup the APIC counter to maximum. There is no way the lapic
> * can underflow in the 100ms detection time frame.
Hi Juergen,
On 30/05/2023 10:13, Juergen Gross wrote:
Today all Xenstore nodes are stored in a TDB data base. This data base
has several disadvantages:
- it is using a fixed sized hash table, resulting in high memory
overhead for small installations with only very few VMs, and a rather
la
On Tue, Jun 20, 2023 at 12:34:52PM +0200, Simone Ballarin wrote:
> From: Gianluca Luparini
>
> The xen sources contains violations of MISRA C:2012 Rule 7.2 whose headline
> states:
> "A "u" or "U" suffix shall be applied to all integer constants that are
> represented in an unsigned type".
>
>
Hi Juergen,
One more remark as I was reviewing patch #10.
On 30/05/2023 10:13, Juergen Gross wrote:
Add a wrapper function for tdb_fetch taking the name of the node in
the data base as a parameter. Let it return a data pointer and the
length of the data via a length pointer provided as addition
On 20.06.2023 12:35, Simone Ballarin wrote:
> --- a/xen/include/public/io/ring.h
> +++ b/xen/include/public/io/ring.h
> @@ -36,11 +36,11 @@
> typedef unsigned int RING_IDX;
>
> /* Round a 32-bit unsigned constant down to the nearest power of two. */
> -#define __RD2(_x) (((_x) & 0x0002) ?
On 20.06.2023 12:34, Simone Ballarin wrote:
> --- a/xen/arch/x86/cpu/vpmu_intel.c
> +++ b/xen/arch/x86/cpu/vpmu_intel.c
> @@ -950,10 +950,10 @@ const struct arch_vpmu_ops *__init core2_vpmu_init(void)
> fixed_ctrl_mask |=
> (FIXED_CTR_CTRL_ANYTHREAD_MASK << (FIXED_CTR_CTRL_BITS
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