>>> On 31.05.17 at 16:29, wrote:
> On Tue, May 30, 2017 at 04:01:00AM -0600, Jan Beulich wrote:
>> >>> On 17.05.17 at 17:15, wrote:
>> > --- a/xen/arch/x86/hvm/irq.c
>> > +++ b/xen/arch/x86/hvm/irq.c
>> > @@ -126,6 +126,49 @@ void hvm_pci_intx_deassert(
>> > spin_unlock(&d->arch.hvm_domain.i
>>> On 31.05.17 at 16:48, wrote:
> On Tue, May 30, 2017 at 04:05:39AM -0600, Jan Beulich wrote:
>> >>> On 17.05.17 at 17:15, wrote:
>> > Changes since v2:
>> > - s/vioapic_dom0_map_gsi/vioapic_hwdom_map_gsi/.
>> > - Don't set hvm_domid in xen_domctl_bind_pt_irq_t (it's ignored).
>>
>> The impl
>>> On 31.05.17 at 23:20, wrote:
> The patch imports the changes and updates of the rbtree implementaiton
> from Linux tree. But since, the only current implementation is with tmem.c,
> which am not much aware off much and therefore, was unable to test the
> changes
> thoroughly. Having said that
On Thu, 2017-06-01 at 01:26 -0600, Jan Beulich wrote:
> > > > On 31.05.17 at 23:20, wrote:
> > I have not imported augmented and rcu rbtree functionality to the
> > xen tree,
> > as there was no specific requirement for current planned
> > implementation.
> >
> Bug fixes and improvements to exist
On Wed, 2017-05-31 at 23:56 +0100, Andrew Cooper wrote:
> As an example, see
>
> http://xenbits.xen.org/gitweb/?p=xen.git;a=commitdiff;h=b01c2fb5834ae
> a0328db55c310caa34173021d3d
>
Nice, I especially like how the changelog looks, i.e.:
- original Linux patch description description
- Linux's
flight 71463 distros-debian-wheezy real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/71463/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
build-arm64 2 hosts-allocate broken never pass
build-arm64-pvops
Hi Wei,
Thanks for your explanation.
>> >> >> @@ -151,13 +154,19 @@ retry_transaction:
>> >> >> if (rc) goto out;
>> >> >>
>> >> >> if (!libxl_only) {
>> >> >> -rc = libxl__xs_write_checked(gc, t,
>> >> >> GCSPRINTF("%s/frontend",libxl_path),
>> >> >> -
This run is configured for baseline tests only.
flight 71464 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/71464/
Failures :-/ but no regressions.
Regressions which are regarded as allowable (not blocking):
build-amd64-libvirt 5 libvirt-buildfai
Hello,
I've found a second instance of this vmentry failure, this time from a
Windows 7 32bit VM.
(XEN) d18v1 vmentry failure (reason 0x8021): Invalid guest state (0)
(XEN) * VMCS Area **
(XEN) *** Guest State ***
(XEN) CR0: actual=0x8001003b, shadow=0x
On 17-05-30 08:32:59, Jan Beulich wrote:
> >>> On 03.05.17 at 10:44, wrote:
> > --- a/xen/arch/x86/psr.c
> > +++ b/xen/arch/x86/psr.c
> > @@ -118,11 +118,13 @@ static const struct feat_props {
> > * COS ID. Every entry of cos_ref corresponds to one COS ID.
> > */
> > struct psr_so
On 29/05/17 10:15, Jan Beulich wrote:
On 29.05.17 at 11:03, wrote:
>> On 29/05/2017 09:58, Jan Beulich wrote:
>> On 26.05.17 at 19:03, wrote:
--- a/xen/arch/x86/mm/guest_walk.c
+++ b/xen/arch/x86/mm/guest_walk.c
@@ -114,22 +114,18 @@ guest_walk_tables(struct vcpu *v, struc
>>> On 01.06.17 at 11:12, wrote:
> We attempted to inject an NMI. As this is a plain VM without any
> hardware, I expect it came from an IPI rather than something external to
> the VM. This also matches up with the interruptibility indicating that
> the guest is in an NMI shadow.
>
> Being 32bi
Hi,
On 30/05/17 18:33, Julien Grall wrote:
On 30/05/17 18:29, Stefano Stabellini wrote:
On Fri, 26 May 2017, Volodymyr Babchuk wrote:
The other issue with stubdoms is context switch times. Volodymyr
showed
that minios has much higher context switch times compared to EL0
apps.
It is probably
Hi Julien,
On 22 May 2017 at 19:54, Julien Grall wrote:
>> +static const struct mmio_handler_ops vpl011_mmio_handler = {
>> +.read = vpl011_mmio_read,
>> +.write = vpl011_mmio_write,
>> +};
>> +
>> +int vpl011_map_guest_page(struct domain *d, xen_pfn_t gfn)
>
>
> This function should eith
>>> On 01.06.17 at 12:00, wrote:
> On 17-05-30 08:32:59, Jan Beulich wrote:
>> >>> On 03.05.17 at 10:44, wrote:
>> > --- a/xen/arch/x86/psr.c
>> > +++ b/xen/arch/x86/psr.c
>> > @@ -118,11 +118,13 @@ static const struct feat_props {
>> > * COS ID. Every entry of cos_ref corresponds t
Hi Stefano,
On 31/05/17 18:45, Stefano Stabellini wrote:
On Wed, 31 May 2017, George Dunlap wrote:
On 30/05/17 18:29, Stefano Stabellini wrote:
On Fri, 26 May 2017, Volodymyr Babchuk wrote:
The other issue with stubdoms is context switch times. Volodymyr showed
that minios has much higher con
On 01/06/17 11:22, Jan Beulich wrote:
On 01.06.17 at 11:12, wrote:
>> We attempted to inject an NMI. As this is a plain VM without any
>> hardware, I expect it came from an IPI rather than something external to
>> the VM. This also matches up with the interruptibility indicating that
>> the
>>> On 01.06.17 at 12:19, wrote:
> On 29/05/17 10:15, Jan Beulich wrote:
> On 29.05.17 at 11:03, wrote:
>>> On 29/05/2017 09:58, Jan Beulich wrote:
>>> On 26.05.17 at 19:03, wrote:
> --- a/xen/arch/x86/mm/guest_walk.c
> +++ b/xen/arch/x86/mm/guest_walk.c
> @@ -114,22 +114,18
flight 109892 linux-next real [real]
http://logs.test-lab.xenproject.org/osstest/logs/109892/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-libvirt-xsm 6 xen-boot fail REGR. vs. 109858
test-amd64-i386-qemu
> On May 31, 2017, at 6:45 PM, Stefano Stabellini
> wrote:
>
> On Wed, 31 May 2017, George Dunlap wrote:
>> On 30/05/17 18:29, Stefano Stabellini wrote:
>>> On Fri, 26 May 2017, Volodymyr Babchuk wrote:
>>> The other issue with stubdoms is context switch times. Volodymyr showed
>>> that
> On Jun 1, 2017, at 11:52 AM, George Dunlap wrote:
>
>
>> On May 31, 2017, at 6:45 PM, Stefano Stabellini
>> wrote:
>>
>> On Wed, 31 May 2017, George Dunlap wrote:
>>> On 30/05/17 18:29, Stefano Stabellini wrote:
On Fri, 26 May 2017, Volodymyr Babchuk wrote:
The other issue wi
>>> On 01.06.17 at 12:50, wrote:
> On 01/06/17 11:22, Jan Beulich wrote:
>> But that raises
>> another possibility: What if the selector here actually is pointing
>> into the IDT? The SDM says it's the TSS selector that the exit
>> qualification provides, but what if in fact it's the error code
>
Hi Jan,
On 31/05/17 08:51, Jan Beulich wrote:
While f32400e90c ("x86: fix build with gcc 7")'s change to
compat_array_access_ok() is necessary, I had blindly and needlessly
also added it to array_access_ok(). There's no conditional expression
involved there, so undo it.
Signed-off-by: Jan Beuli
Hi Andrew,
On 31/05/17 14:23, Andrew Cooper wrote:
On 31/05/17 09:52, Julien Grall wrote:
Hi,
On 05/22/2017 02:32 PM, Jan Beulich wrote:
On 22.05.17 at 15:12, wrote:
_PAGE_GNTTAB is only used in debug builds of Xen; in release builds,
it has
the value 0. Coverity complains that "l1e_get_fl
On Wed, May 31, 2017 at 07:06:08PM +0100, Wei Liu wrote:
> On Wed, Apr 26, 2017 at 04:54:51PM +0100, Wei Liu wrote:
> > We want to have a single entry point to initialise hvm guest. To do
> > this, the setting of hap_enabled and creation of the per domain mappings
> > is deferred, but that's not a
flight 109923 ovmf real [real]
http://logs.test-lab.xenproject.org/osstest/logs/109923/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf a6b5380642c4d9f55175dd5f423bae9ecc1be9d8
baseline version:
ovmf 8bef878beada6400aaed2
>>> On 01.06.17 at 13:06, wrote:
> On 31/05/17 08:51, Jan Beulich wrote:
>> While f32400e90c ("x86: fix build with gcc 7")'s change to
>> compat_array_access_ok() is necessary, I had blindly and needlessly
>> also added it to array_access_ok(). There's no conditional expression
>> involved there,
flight 109924 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/109924/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-arm64-arm64-xl-xsm 1 build-check(1) blocked n/a
test-amd64-amd64-libvirt 12 mig
>>> On 01.06.17 at 13:09, wrote:
> Hi Andrew,
>
> On 31/05/17 14:23, Andrew Cooper wrote:
>> On 31/05/17 09:52, Julien Grall wrote:
>>> Hi,
>>>
>>> On 05/22/2017 02:32 PM, Jan Beulich wrote:
>>> On 22.05.17 at 15:12, wrote:
> _PAGE_GNTTAB is only used in debug builds of Xen; in release b
Hi Jan,
On 01/06/17 12:15, Jan Beulich wrote:
On 01.06.17 at 13:09, wrote:
Hi Andrew,
On 31/05/17 14:23, Andrew Cooper wrote:
On 31/05/17 09:52, Julien Grall wrote:
Hi,
On 05/22/2017 02:32 PM, Jan Beulich wrote:
On 22.05.17 at 15:12, wrote:
_PAGE_GNTTAB is only used in debug builds of X
>>> On 01.06.17 at 13:10, wrote:
> @@ -635,6 +627,11 @@ int arch_domain_create(struct domain *d, unsigned int
> domcr_flags,
> HYPERVISOR_COMPAT_VIRT_START(d) =
> is_pv_domain(d) ? __HYPERVISOR_COMPAT_VIRT_START : ~0u;
>
> +/* Need to determine if HAP is enabled before initial
>>> On 01.06.17 at 13:18, wrote:
> Hi Jan,
>
> On 01/06/17 12:15, Jan Beulich wrote:
> On 01.06.17 at 13:09, wrote:
>>> Hi Andrew,
>>>
>>> On 31/05/17 14:23, Andrew Cooper wrote:
On 31/05/17 09:52, Julien Grall wrote:
> Hi,
>
> On 05/22/2017 02:32 PM, Jan Beulich wrote:
On 01/06/17 11:51, Jan Beulich wrote:
On 01.06.17 at 12:19, wrote:
>> On 29/05/17 10:15, Jan Beulich wrote:
>> On 29.05.17 at 11:03, wrote:
On 29/05/2017 09:58, Jan Beulich wrote:
On 26.05.17 at 19:03, wrote:
>> --- a/xen/arch/x86/mm/guest_walk.c
>> +++ b/xen/arch/
Hi,
I was trying to study the working of xen. From what I understood, dom0
issues a hypercall to create domU. but I couldn't understand where the dtb
for domU comes from?. I found the flow from hypercall to domain_create
function.
please help me...
___
Xe
On Thu, Jun 01, 2017 at 05:19:31AM -0600, Jan Beulich wrote:
> >>> On 01.06.17 at 13:10, wrote:
> > @@ -635,6 +627,11 @@ int arch_domain_create(struct domain *d, unsigned int
> > domcr_flags,
> > HYPERVISOR_COMPAT_VIRT_START(d) =
> > is_pv_domain(d) ? __HYPERVISOR_COMPAT_VIRT_START
Add the glue in order to bind the PVH Dom0 GSI from bare metal. This
is done when Dom0 unmasks the vIO APIC pins, by fetching the current
pin settings and setting up the PIRQ, which will then be bound to
Dom0.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
Changes sinc
This filed is unused and serves no purpose.
Signed-off-by: Roger Pau Monné
Reported by: Jan Beulich
---
Cc: Ian Jackson
Cc: Wei Liu
Cc: Jan Beulich
---
Changes since v3:
- New in this version.
---
tools/libxc/xc_domain.c | 4
xen/include/public/domctl.h | 1 -
2 files changed, 5 de
Achieve this by expanding pt_irq_create_bind in order to support mapping
interrupts of type PT_IRQ_TYPE_PCI to a PVH Dom0. GSIs bound to Dom0 are always
identity bound, which means the all the fields inside of the u.pci sub-struct
are ignored, and only the machine_irq is actually used in order to d
Move the code to allocate and map a domain pirq (either GSI or MSI)
into the x86 irq code base, so that it can be used outside of the
physdev ops.
This change shouldn't affect the functionality of the already existing
physdev ops.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Co
Hello,
The following patches allow binding bare-metal GSIs into a PVHv2 Dom0,
by snooping on the vIO APICs writes made by Dom0.
First patch is a cleanup of an unused field from the bind structure,
patches 2 and 3 introduce the necessary code to bind GSIs into a PVH
Dom0, and patch 4 snoops on vIO
On Thu, Jun 01, 2017 at 12:49:11PM +0100, Roger Pau Monne wrote:
> This filed is unused and serves no purpose.
>
> Signed-off-by: Roger Pau Monné
> Reported by: Jan Beulich
Missing dash.
Acked-by: Wei Liu
___
Xen-devel mailing list
Xen-devel@lists.
>>> On 01.06.17 at 13:22, wrote:
> On 01/06/17 11:51, Jan Beulich wrote:
>> While this perhaps is a worthwhile addition, my original request
>> really was to make more visible around the place where it matters
>> that the NX bit is part of the reserved ones when NX is off. Hence
>> I'm not sure th
Commit aac1df3d03 ("x86/HVM: introduce hvm_get_cpl() and respective
hook") went too far in one aspect: When emulating a task switch we
really shouldn't be looking at what hvm_get_cpl() returns, as we're
switching all segment registers.
However, instead of reverting the relevant parts of that commi
Also drop a stray initializer.
Signed-off-by: Jan Beulich
--- a/xen/arch/x86/mm/hap/hap.c
+++ b/xen/arch/x86/mm/hap/hap.c
@@ -248,8 +248,7 @@ static void hap_clean_dirty_bitmap(struc
//
static struct page_info *hap_alloc(struct domain *d)
{
-
On 01/06/17 11:33, Bhupinder Thakur wrote:
Hi Julien,
Hi Bhupinder,
On 22 May 2017 at 19:54, Julien Grall wrote:
+static const struct mmio_handler_ops vpl011_mmio_handler = {
+.read = vpl011_mmio_read,
+.write = vpl011_mmio_write,
+};
+
+int vpl011_map_guest_page(struct domain *d,
On Thu, 2017-06-01 at 12:52 +0200, George Dunlap wrote:
> > On May 31, 2017, at 6:45 PM, Stefano Stabellini > .org> wrote:
> >
> > I don't think we should provide that. If the user wants a stable
> > interface, she can use domains. I suggested that the code for the
> > EL0
> > app should come out
Hi Boris,
On 31/05/17 14:54, Boris Ostrovsky wrote:
On 05/31/2017 09:03 AM, Julien Grall wrote:
Commit 5995a68 "xen/privcmd: Add support for Linux 64KB page granularity" did
not go far enough to support 64KB in mmap_batch_fn.
The variable 'nr' is the number of 4KB chunk to map. However, when L
>>> On 31.05.17 at 14:14, wrote:
> On 31/05/17 08:23, Jan Beulich wrote:
>> -if ((vmcb->_cr3 & 0x7) != 0) {
>> -PRINTF("CR3: MBZ bits are set (%#"PRIx64")\n", vmcb->_cr3);
>> -}
>> -if ((vmcb->_efer & EFER_LMA) && (vmcb->_cr3 & 0xfe) != 0) {
>> -PRINTF("CR3: MBZ bits ar
flight 109898 qemu-mainline real [real]
http://logs.test-lab.xenproject.org/osstest/logs/109898/
Failures :-/ but no regressions.
Regressions which are regarded as allowable (not blocking):
test-armhf-armhf-xl-rtds15 guest-start/debian.repeat fail REGR. vs. 109701
Tests which did not succee
This run is configured for baseline tests only.
flight 71465 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/71465/
Failures :-/ but no regressions.
Regressions which are regarded as allowable (not blocking):
build-amd64-libvirt 5 libvirt-buildfai
The number of buffers is ahead of the buffer list in the argument list.
Signed-off-by: Andrew Cooper
---
CC: George Dunlap
CC: Ian Jackson
CC: Jan Beulich
CC: Konrad Rzeszutek Wilk
CC: Stefano Stabellini
CC: Tim Deegan
CC: Wei Liu
CC: Paul Durrant
CC: Julien Grall
For 4.9. This is only
On Thu, Jun 01, 2017 at 02:10:50PM +0100, Andrew Cooper wrote:
> The number of buffers is ahead of the buffer list in the argument list.
>
> Signed-off-by: Andrew Cooper
Acked-by: Wei Liu
___
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lis
>>> On 01.06.17 at 13:49, wrote:
> --- a/xen/include/public/domctl.h
> +++ b/xen/include/public/domctl.h
> @@ -559,7 +559,6 @@ typedef enum pt_irq_type_e {
> struct xen_domctl_bind_pt_irq {
> uint32_t machine_irq;
> pt_irq_type_t irq_type;
> -uint32_t hvm_domid;
>
> union {
>
On 01/06/17 13:27, Jan Beulich wrote:
> Also drop a stray initializer.
>
> Signed-off-by: Jan Beulich
Reviewed-by: Andrew Cooper
___
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
>>> On 31.05.17 at 16:14, wrote:
> Update hpet_broadcast_{enter,exit}() to use this_cpu() rather than per_cpu()
> for clarity,
I'm afraid this makes things worse in other respects (see below).
> @@ -697,8 +696,9 @@ void hpet_broadcast_enter(void)
> {
> unsigned int cpu = smp_processor_id()
On 06/01/2017 08:50 AM, Julien Grall wrote:
> Hi Boris,
>
> On 31/05/17 14:54, Boris Ostrovsky wrote:
>> On 05/31/2017 09:03 AM, Julien Grall wrote:
>>> Commit 5995a68 "xen/privcmd: Add support for Linux 64KB page
>>> granularity" did
>>> not go far enough to support 64KB in mmap_batch_fn.
>>>
>>>
Hi Julien,
On 26 May 2017 at 19:12, Bhupinder Thakur wrote:
>>> +
>>> +switch ( vpl011_reg )
>>> +{
>>> +case DR:
>>
>>
>> As mentioned above, you could do:
>>
>> {
>> uint8_t ch;
>>
>> }
>>
>>> +vpl011_read_data(v->domain, &ch);
>>> +*r = ch;
>>
>>
>> P
On 05/31/2017 10:25 PM, Steven Haigh wrote:
> On 2017-05-31 00:37, Steven Haigh wrote:
>> On 31/05/17 00:18, Boris Ostrovsky wrote:
>>> On 05/30/2017 06:27 AM, Steven Haigh wrote:
Just wanted to give this a nudge to try and get some suggestions on
where to go / what to do about this.
Hi Bhupinder,
On 01/06/17 14:34, Bhupinder Thakur wrote:
On 26 May 2017 at 19:12, Bhupinder Thakur wrote:
+
+switch ( vpl011_reg )
+{
+case DR:
As mentioned above, you could do:
{
uint8_t ch;
}
+vpl011_read_data(v->domain, &ch);
+*r = ch;
Ple
>>> On 31.05.17 at 14:41, wrote:
> According to SDM Chapter ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (APIC)
> -> Extended XAPIC (x2APIC) -> x2APIC State Transitions, The existing code to
> handle guest's writing MSR_IA32_APICBASE has two flaws:
> 1. Transition from x2APIC Mode to Disabled Mode i
Hi Boris,
On 01/06/17 14:33, Boris Ostrovsky wrote:
On 06/01/2017 08:50 AM, Julien Grall wrote:
Hi Boris,
On 31/05/17 14:54, Boris Ostrovsky wrote:
On 05/31/2017 09:03 AM, Julien Grall wrote:
Commit 5995a68 "xen/privcmd: Add support for Linux 64KB page
granularity" did
not go far enough to s
On Thursday, 1 June 2017 11:56:28 PM AEST Boris Ostrovsky wrote:
> On 05/31/2017 10:25 PM, Steven Haigh wrote:
> > On 2017-05-31 00:37, Steven Haigh wrote:
> >> On 31/05/17 00:18, Boris Ostrovsky wrote:
> >>> On 05/30/2017 06:27 AM, Steven Haigh wrote:
> Just wanted to give this a nudge to try
>>> On 01.06.17 at 13:49, wrote:
> Move the code to allocate and map a domain pirq (either GSI or MSI)
> into the x86 irq code base, so that it can be used outside of the
> physdev ops.
>
> This change shouldn't affect the functionality of the already existing
> physdev ops.
>
> Signed-off-by: R
On 01/06/17 13:27, Jan Beulich wrote:
> Also drop a stray initializer.
>
> Signed-off-by: Jan Beulich
Acked-by: George Dunlap
>
> --- a/xen/arch/x86/mm/hap/hap.c
> +++ b/xen/arch/x86/mm/hap/hap.c
> @@ -248,8 +248,7 @@ static void hap_clean_dirty_bitmap(struc
> /**
On 01/06/17 12:49, Roger Pau Monne wrote:
> Move the code to allocate and map a domain pirq (either GSI or MSI)
> into the x86 irq code base, so that it can be used outside of the
> physdev ops.
>
> This change shouldn't affect the functionality of the already existing
> physdev ops.
>
> Signed-off
On Thu, Jun 01, 2017 at 07:17:16AM -0600, Jan Beulich wrote:
> >>> On 01.06.17 at 13:49, wrote:
> > --- a/xen/include/public/domctl.h
> > +++ b/xen/include/public/domctl.h
> > @@ -559,7 +559,6 @@ typedef enum pt_irq_type_e {
> > struct xen_domctl_bind_pt_irq {
> > uint32_t machine_irq;
> >
On 01/06/17 13:40, Dario Faggioli wrote:
> On Thu, 2017-06-01 at 12:52 +0200, George Dunlap wrote:
>>> On May 31, 2017, at 6:45 PM, Stefano Stabellini >> .org> wrote:
>>>
>>> I don't think we should provide that. If the user wants a stable
>>> interface, she can use domains. I suggested that the co
On 06/01/2017 10:01 AM, Julien Grall wrote:
> Hi Boris,
>
> On 01/06/17 14:33, Boris Ostrovsky wrote:
>> On 06/01/2017 08:50 AM, Julien Grall wrote:
>>> Hi Boris,
>>>
>>> On 31/05/17 14:54, Boris Ostrovsky wrote:
On 05/31/2017 09:03 AM, Julien Grall wrote:
> Commit 5995a68 "xen/privcmd: Ad
The current implementation does not provide appropriate types for
short-descriptor translation table entries. As such, this commit adds new
types, which simplify managing the respective translation table entries.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
x
This commit adds functionality to walk the guest's page tables using the
long-descriptor translation table format for both ARMv7 and ARMv8.
Similar to the hardware architecture, the implementation supports
different page granularities (4K, 16K, and 64K). The implementation is
based on ARM DDI 0487A
This commit adds two defines holding the register width of 32 bit and 64 bit
registers. These defines simplify using the associated constants in the
following commits.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/include/asm-arm/processor.h | 4
1 fi
This commit adds (TCR_|TTBCR_)* defines to simplify access to the respective
register contents.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Define TCR_SZ_MASK in a way so that it can be also applied to 32-bit guests
using the long-descriptor translati
The ARMv8 architecture supports pages with different (4K, 16K, and 64K) sizes.
To enable guest page table walks for various configurations, this commit
extends the defines and helpers of the current implementation.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
The ARMv8 architecture supports pages with different (4K, 16K, and 64K) sizes.
To enable guest page table walks for various configurations, this commit
extends the defines and helpers of the current implementation.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
In this commit, we make use of the gpt walk functionality introduced in the
previous commits. If mem_access is active, hardware-based gva to ipa
translation might fail, as gva_to_ipa uses the guest's translation tables,
access to which might be restricted by the active VTTBR. To side-step potential
The current implementation does not provide appropriate types for
short-descriptor translation table entries. As such, this commit adds new
types, which simplify managing the respective translation table entries.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
x
Hi all,
The function p2m_mem_access_check_and_get_page is called from the function
get_page_from_gva if mem_access is active and the hardware-aided translation of
the given guest virtual address (gva) into machine address fails. That is, if
the stage-2 translation tables constrain access to the gu
This commit adds functionality to walk the guest's page tables using the
short-descriptor translation table format for both ARMv7 and ARMv8. The
implementation is based on ARM DDI 0487A-g G4-4189 and ARM DDI 0406C-b
B3-1506.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien G
In this commit, we make use of the gpt walk functionality introduced in the
previous commits. If mem_access is active, hardware-based gva to ipa
translation might fail, as gva_to_ipa uses the guest's translation tables,
access to which might be restricted by the active VTTBR. To side-step potential
This commit adds functionality to walk the guest's page tables using the
short-descriptor translation table format for both ARMv7 and ARMv8. The
implementation is based on ARM DDI 0487A-g G4-4189 and ARM DDI 0406C-b
B3-1506.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien G
The function p2m_mem_access_check_and_get_page in mem_access.c translates a gva
to an ipa by means of the hardware functionality of the ARM architecture. This
is implemented in the function gva_to_ipa. If mem_access is active,
hardware-based gva to ipa translation might fail, as gva_to_ipa uses the
This commit adds (TCR_|TTBCR_)* defines to simplify access to the respective
register contents.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Define TCR_SZ_MASK in a way so that it can be also applied to 32-bit guests
using the long-descriptor translati
This commit adds functionality to walk the guest's page tables using the
long-descriptor translation table format for both ARMv7 and ARMv8.
Similar to the hardware architecture, the implementation supports
different page granularities (4K, 16K, and 64K). The implementation is
based on ARM DDI 0487A
The function p2m_mem_access_check_and_get_page in mem_access.c translates a gva
to an ipa by means of the hardware functionality of the ARM architecture. This
is implemented in the function gva_to_ipa. If mem_access is active,
hardware-based gva to ipa translation might fail, as gva_to_ipa uses the
This commit adds two defines holding the register width of 32 bit and 64 bit
registers. These defines simplify using the associated constants in the
following commits.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/include/asm-arm/processor.h | 4
1 fi
On Thu, Jun 01, 2017 at 03:40:07PM +0100, Andrew Cooper wrote:
> On 01/06/17 12:49, Roger Pau Monne wrote:
> > Move the code to allocate and map a domain pirq (either GSI or MSI)
> > into the x86 irq code base, so that it can be used outside of the
> > physdev ops.
> >
> > This change shouldn't aff
Hi Boris,
On 01/06/17 16:16, Boris Ostrovsky wrote:
On 06/01/2017 10:01 AM, Julien Grall wrote:
Hi Boris,
On 01/06/17 14:33, Boris Ostrovsky wrote:
On 06/01/2017 08:50 AM, Julien Grall wrote:
Hi Boris,
On 31/05/17 14:54, Boris Ostrovsky wrote:
On 05/31/2017 09:03 AM, Julien Grall wrote:
C
From the context calling pi_desc_init(), we can conclude the current
implementation of VT-d PI depends on CPU-side PI. If we disable APICv
but enable VT-d PI explicitly in xen boot command line, we would get
an assertion failure.
This patch disables VT-d PI when APICv is disabled and adds some
rel
Hi,
On 01/06/17 14:11, Wei Liu wrote:
On Thu, Jun 01, 2017 at 02:10:50PM +0100, Andrew Cooper wrote:
The number of buffers is ahead of the buffer list in the argument list.
Signed-off-by: Andrew Cooper
Acked-by: Wei Liu
In general I am happy with any documentation update for Xen 4.9:
Re
Hi,
Can someone explain, why evtchn_fifo_unmask() requires irqs_disabled().
What happens, if irqs are not disabled ?
Thanks,
Anoob.
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Xen-devel@lists.xen.org
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CC Ian + Wei for the testing
On 01/06/17 12:21, Jan Beulich wrote:
On 01.06.17 at 13:18, wrote:
Hi Jan,
On 01/06/17 12:15, Jan Beulich wrote:
On 01.06.17 at 13:09, wrote:
Hi Andrew,
On 31/05/17 14:23, Andrew Cooper wrote:
On 31/05/17 09:52, Julien Grall wrote:
Hi,
On 05/22/2017 02:32 P
In fact, right now, we read it at every iteration of the loop.
The reason it's done like this is how context switch was handled
on IA64 (see commit ae9bfcdc, "[XEN] Various softirq cleanups" [1]).
However:
1) we don't have IA64 any longer, and all the achitectures that
we do support, are ok wit
Hello,
While chasing and dealing with bugs, over this last period, I've found myself
augmenting Xen with quite a few new tracing capabilities, especially focusing
on:
- IRQ being disabled and (re)enabled (in addition to the already existing
tracing of IRQ related activity that we have);
- RCU
In fact, when calling __trace_var() directly, we can
assume that tb_init_done has been checked to be true,
and the if is hence redundant.
While there, also:
- still in __trace_var(), move the check that the event
is actually being traced up a little bit (to bail as
soon as possible, if it i
More specifically:
- the handling of the TRC_HW_IRQ_HANDLED is fixed, both in
xentrace_format and in xenalyze;
- simple events for recording when we enter and exit the
do_IRQ function, as well as when we deal with a guest
IRQ, are added;
- tracing of IRQs handled with direct vectors is
In fact, not all the information present in the trace
record were used and printed.
Signed-off-by: Dario Faggioli
---
George Dunlap
Ian Jackson
Wei Liu
---
tools/xentrace/xenalyze.c | 24 +++-
1 file changed, 19 insertions(+), 5 deletions(-)
diff --git a/tools/xentrace/
Trace when interrupts are disabled and (re)enabled.
Basically, we replace the IRQ disabling and enabling
functions with helpers that does the same, but also
output the proper trace record.
For putting in the record something that will let
us identify _where_ in the code (i.e., in what function)
th
Making it possible generate events showing the
activity and the behavior of the RCU subsystem.
Gate this with its specific Kconfig option (under
CONFIG_TRACING), and keep it in disabled state by
default.
---
Cc: George Dunlap
Cc: Andrew Cooper
Cc: Jan Beulich
Cc: Konrad Rzeszutek Wilk
Cc: Stef
And compile it out of the hypervisor entirely.
Code and other sections' sizes change as follows.
Output of `size`:
vanilla patched-Y patched-N
text 192900719290071902783
data 337784 337784 337688
bss 131046413104641310336
Output of `size -A`:
vani
Making it possible generate events showing the
activity and the behavior of the softirq subsystem.
Gate this with its specific Kconfig option (under
CONFIG_TRACING), and keep it in disabled state by
default.
---
Cc: George Dunlap
Cc: Andrew Cooper
Cc: Jan Beulich
Cc: Konrad Rzeszutek Wilk
Cc:
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