>>> On 31.05.17 at 14:41, <chao....@intel.com> wrote: > According to SDM Chapter ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (APIC) > -> Extended XAPIC (x2APIC) -> x2APIC State Transitions, The existing code to > handle guest's writing MSR_IA32_APICBASE has two flaws: > 1. Transition from x2APIC Mode to Disabled Mode is allowed but wrongly > disabled currently. Fix it by removing the related check. > 2. Transition from x2APIC Mode to xAPIC Mode is illegal but wrongly allowed > currently. Considering changing ENABLE bit of the MSR has been handled, > it can be fixed by only allowing transition from xAPIC Mode to x2APIC Mode > (the other two transitions: from x2APIC mode to xAPIC Mode, from disabled > mode > to invalid state (EN=0, EXTD=1) are disabled). > > Signed-off-by: Chao Gao <chao....@intel.com>
Reviewed-by: Jan Beulich <jbeul...@suse.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel
