On Wed, 22 Jun 2016, Julien Grall wrote:
> Hi Stefano,
>
> On 22/06/16 11:08, Stefano Stabellini wrote:
> > On Tue, 7 Jun 2016, Julien Grall wrote:
> > > The ARM erratum applies to certain revisions of Cortex-A57. The
> > > processor may report a Stage 2 translation fault as the result of
> > > St
Hi Stefano,
On 22/06/16 11:08, Stefano Stabellini wrote:
On Tue, 7 Jun 2016, Julien Grall wrote:
The ARM erratum applies to certain revisions of Cortex-A57. The
processor may report a Stage 2 translation fault as the result of
Stage 1 fault for load crossing a page boundary when there is a
perm
On Tue, 7 Jun 2016, Julien Grall wrote:
> The ARM erratum applies to certain revisions of Cortex-A57. The
> processor may report a Stage 2 translation fault as the result of
> Stage 1 fault for load crossing a page boundary when there is a
> permission fault or device memory fault at stage 1 and a
Hello,
On 07/06/16 17:06, Julien Grall wrote:
The ARM erratum applies to certain revisions of Cortex-A57. The
processor may report a Stage 2 translation fault as the result of
Stage 1 fault for load crossing a page boundary when there is a
permission fault or device memory fault at stage 1 and a
The ARM erratum applies to certain revisions of Cortex-A57. The
processor may report a Stage 2 translation fault as the result of
Stage 1 fault for load crossing a page boundary when there is a
permission fault or device memory fault at stage 1 and a translation
fault at Stage 2.
So Xen needs to c
