>>> On 24.01.17 at 17:30, wrote:
> The entirety of edx is reserved.
>
> Intel only defines the lower 16 bits of eax, although ebx is covered by the
> featureset ABI, so left unclobbered.
>
> AMD uses 24 bits in eax, although nothing thus far has ever exposed a non-zero
> guest maxphysaddr to HVM
The entirety of edx is reserved.
Intel only defines the lower 16 bits of eax, although ebx is covered by the
featureset ABI, so left unclobbered.
AMD uses 24 bits in eax, although nothing thus far has ever exposed a non-zero
guest maxphysaddr to HVM guests. Its semantics are not clearly expresse
