On Mon, 2015-04-13 at 10:11 +0100, Jan Beulich wrote:
> >>> On 02.04.15 at 18:49, wrote:
> > In any case we should make it clear somewhere who is supposed to write
> > to the command register (and other PCI reigsters) at any given time,
> > otherwise it would be very easy for a new kernel update t
On Mon, 13 Apr 2015, Jan Beulich wrote:
> >>> On 13.04.15 at 14:01, wrote:
> > On Mon, 13 Apr 2015, Jan Beulich wrote:
> >> >>> On 13.04.15 at 12:50, wrote:
> >> > On Mon, 13 Apr 2015, Jan Beulich wrote:
> >> >> While we trust Dom0 to not do outright bad things,
> >> >> the hypervisor should stil
>>> On 13.04.15 at 14:01, wrote:
> On Mon, 13 Apr 2015, Jan Beulich wrote:
>> >>> On 13.04.15 at 12:50, wrote:
>> > On Mon, 13 Apr 2015, Jan Beulich wrote:
>> >> While we trust Dom0 to not do outright bad things,
>> >> the hypervisor should still avoid doing things that can go wrong
>> >> due to
On Mon, 13 Apr 2015, Jan Beulich wrote:
> >>> On 13.04.15 at 12:50, wrote:
> > On Mon, 13 Apr 2015, Jan Beulich wrote:
> >> >>> On 02.04.15 at 18:49, wrote:
> >> > On Wed, 25 Mar 2015, Jan Beulich wrote:
> >> >> When a device gets detached from a guest, pciback will clear its
> >> >> command regi
>>> On 13.04.15 at 12:50, wrote:
> On Mon, 13 Apr 2015, Jan Beulich wrote:
>> >>> On 02.04.15 at 18:49, wrote:
>> > On Wed, 25 Mar 2015, Jan Beulich wrote:
>> >> When a device gets detached from a guest, pciback will clear its
>> >> command register, thus disabling both memory and I/O decoding. T
On Mon, 13 Apr 2015, Jan Beulich wrote:
> >>> On 02.04.15 at 18:49, wrote:
> > On Wed, 25 Mar 2015, Jan Beulich wrote:
> >> When a device gets detached from a guest, pciback will clear its
> >> command register, thus disabling both memory and I/O decoding. The
> >> disabled memory decoding, howeve
>>> On 02.04.15 at 18:49, wrote:
> On Wed, 25 Mar 2015, Jan Beulich wrote:
>> When a device gets detached from a guest, pciback will clear its
>> command register, thus disabling both memory and I/O decoding. The
>> disabled memory decoding, however, has an effect on the MSI-X table
>> accesses th
On Wed, 25 Mar 2015, Jan Beulich wrote:
> When a device gets detached from a guest, pciback will clear its
> command register, thus disabling both memory and I/O decoding. The
> disabled memory decoding, however, has an effect on the MSI-X table
> accesses the hypervisor does: These won't have the
On 25/03/15 16:39, Jan Beulich wrote:
> When a device gets detached from a guest, pciback will clear its
> command register, thus disabling both memory and I/O decoding. The
> disabled memory decoding, however, has an effect on the MSI-X table
> accesses the hypervisor does: These won't have the in
When a device gets detached from a guest, pciback will clear its
command register, thus disabling both memory and I/O decoding. The
disabled memory decoding, however, has an effect on the MSI-X table
accesses the hypervisor does: These won't have the intended effect
anymore. Even worse, for PCIe de
10 matches
Mail list logo
