On Fri, 2014-11-28 at 12:48 +, Julien Grall wrote:
> Hi Ian,
>
> On 28/11/14 11:47, Ian Campbell wrote:
> > On Thu, 2014-11-27 at 18:02 +, Julien Grall wrote:
> >> state at the GIC level. This would also avoid masking the output signal
> >> and requires specific handling in the guest OS.
>
Hi Ian,
On 28/11/14 11:47, Ian Campbell wrote:
> On Thu, 2014-11-27 at 18:02 +, Julien Grall wrote:
>> state at the GIC level. This would also avoid masking the output signal
>> and requires specific handling in the guest OS.
>
> "which requires"?
>
> It doesn't seem quite right to me otherw
Hi Ian,
On 28/11/14 12:32, Ian Campbell wrote:
> On Thu, 2014-11-27 at 18:02 +, Julien Grall wrote:
>> I propose to reword the commit message into:
>
> You'll want to change the code comment too I think.
It was my plan. I will send a new version during the day.
Regards,
--
Julien Grall
_
On Thu, 2014-11-27 at 18:02 +, Julien Grall wrote:
> I propose to reword the commit message into:
You'll want to change the code comment too I think.
>
> xen/arm: Handle platforms with edge-triggered virtual timer
>
> Some platforms (such as the ARMv8 model) uses edge-triggered interrupt
>
On Thu, 2014-11-27 at 18:02 +, Julien Grall wrote:
> state at the GIC level. This would also avoid masking the output signal
> and requires specific handling in the guest OS.
"which requires"?
It doesn't seem quite right to me otherwise, since context switching the
virq state *removes* the ne
Hi,
On 25/11/14 17:44, Julien Grall wrote:
> ARMv8 model may not disable correctly the timer interrupt when Xen
> context switch to an idle vCPU. Therefore Xen may receive a spurious
> timer interrupt. As the idle domain doesn't have vGIC, Xen will crash
> when trying to inject the interrupt with
Hi Ian,
On 27/11/14 10:40, Ian Campbell wrote:
> On Tue, 2014-11-25 at 17:44 +, Julien Grall wrote:
>> ARMv8 model may not disable correctly the timer interrupt when Xen
>
> "correct disable"
>
>> context switch to an idle vCPU. Therefore Xen may receive a spurious
>
> "context switches" an
Hi Stefano,
On 27/11/14 10:51, Stefano Stabellini wrote:
> On Thu, 27 Nov 2014, Ian Campbell wrote:
>> On Tue, 2014-11-25 at 17:44 +, Julien Grall wrote:
>>> ARMv8 model may not disable correctly the timer interrupt when Xen
>>
>> "correct disable"
>>
>>> context switch to an idle vCPU. Theref
On Thu, 27 Nov 2014, Ian Campbell wrote:
> On Tue, 2014-11-25 at 17:44 +, Julien Grall wrote:
> > ARMv8 model may not disable correctly the timer interrupt when Xen
>
> "correct disable"
>
> > context switch to an idle vCPU. Therefore Xen may receive a spurious
>
> "context switches" and s/s
On Tue, 2014-11-25 at 17:44 +, Julien Grall wrote:
> ARMv8 model may not disable correctly the timer interrupt when Xen
"correct disable"
> context switch to an idle vCPU. Therefore Xen may receive a spurious
"context switches" and s/spurious/unexpected/ (since spurious has a
specific meanin
ARMv8 model may not disable correctly the timer interrupt when Xen
context switch to an idle vCPU. Therefore Xen may receive a spurious
timer interrupt. As the idle domain doesn't have vGIC, Xen will crash
when trying to inject the interrupt with the following stack trace.
(XEN)[<00228
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