Re: [Xen-devel] [PATCH 05/19] x86/mce: merge loops to get Intel extended MC MSR

2017-02-19 Thread Haozhong Zhang
On 02/17/17 02:58 -0700, Jan Beulich wrote: On 17.02.17 at 07:39, wrote: The second loop that gets MSR_IA32_MCG_R8 to MSR_IA32_MCG_R15 was surrounded by '#ifdef __X86_64__ ... #endif' and had to be seperated from the first loop that gets MSR_IA32_MCG_EAX to MSR_IA32_MCG_MISC. Because Xen had dr

Re: [Xen-devel] [PATCH 05/19] x86/mce: merge loops to get Intel extended MC MSR

2017-02-17 Thread Jan Beulich
>>> On 17.02.17 at 07:39, wrote: > The second loop that gets MSR_IA32_MCG_R8 to MSR_IA32_MCG_R15 was > surrounded by '#ifdef __X86_64__ ... #endif' and had to be seperated > from the first loop that gets MSR_IA32_MCG_EAX to MSR_IA32_MCG_MISC. > Because Xen had dropped support for 32-bit x86 host,

[Xen-devel] [PATCH 05/19] x86/mce: merge loops to get Intel extended MC MSR

2017-02-16 Thread Haozhong Zhang
The second loop that gets MSR_IA32_MCG_R8 to MSR_IA32_MCG_R15 was surrounded by '#ifdef __X86_64__ ... #endif' and had to be seperated from the first loop that gets MSR_IA32_MCG_EAX to MSR_IA32_MCG_MISC. Because Xen had dropped support for 32-bit x86 host, these two loops can be merged now. Signed