>>> On 03.01.17 at 15:12, wrote:
On 03.01.17 at 14:30, wrote:
>> On 03/01/17 13:01, Jan Beulich wrote:
>>> @@ -2716,36 +2716,36 @@ x86_emulate(
>>> struct segment_register cs, sreg;
>>>
>>> case 0x00 ... 0x05: add: /* add */
>>> -emulate_2op_SrcV("add", src, dst, _reg
On 03/01/17 14:12, Jan Beulich wrote:
>
>>> --- a/xen/arch/x86/x86_emulate/x86_emulate.h
>>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.h
>>> @@ -583,41 +583,9 @@ x86_emulate(
>>> const struct x86_emulate_ops *ops);
>>>
>>> #ifndef NDEBUG
>>> -/*
>>> - * In debug builds, wrap x86_emulate()
>>> On 03.01.17 at 14:30, wrote:
> On 03/01/17 13:01, Jan Beulich wrote:
>> --- a/xen/arch/x86/x86_emulate.c
>> +++ b/xen/arch/x86/x86_emulate.c
>> @@ -21,6 +21,8 @@
>> #undef cpuid
>> #undef wbinvd
>>
>> +#define r(name) r ## name
>> +
>
> Hmm. I am no overwhelmed with this syntax, but I ca
On 03/01/17 13:01, Jan Beulich wrote:
> This is in preparation of eliminating the mis-naming of 64-bit fields
> with 32-bit register names (eflags instead of rflags etc).
>
> Note that the result is not fully consistent until after at least one
> more patch is in place, primarily to limit patch siz
This is in preparation of eliminating the mis-naming of 64-bit fields
with 32-bit register names (eflags instead of rflags etc).
Note that the result is not fully consistent until after at least one
more patch is in place, primarily to limit patch size (by trying to not
touch the same line twice).
