On 01/09/16 12:31, Andrew Cooper wrote:
> On 29/08/16 14:57, Jan Beulich wrote:
>> - There's no 32-bit displacement in 16-bit addressing mode.
>> - It is wrong to ASSERT() anything on parts of an instruction fetched
>> from guest memory.
>> - The two scaling bits of a SIB byte don't affect whethe
>>> On 01.09.16 at 13:31, wrote:
> On 29/08/16 14:57, Jan Beulich wrote:
>> - There's no 32-bit displacement in 16-bit addressing mode.
>> - It is wrong to ASSERT() anything on parts of an instruction fetched
>> from guest memory.
>> - The two scaling bits of a SIB byte don't affect whether ther
On 29/08/16 14:57, Jan Beulich wrote:
> - There's no 32-bit displacement in 16-bit addressing mode.
> - It is wrong to ASSERT() anything on parts of an instruction fetched
> from guest memory.
> - The two scaling bits of a SIB byte don't affect whether there is no
> scaled index register.
>
> S
- There's no 32-bit displacement in 16-bit addressing mode.
- It is wrong to ASSERT() anything on parts of an instruction fetched
from guest memory.
- The two scaling bits of a SIB byte don't affect whether there is no
scaled index register.
Signed-off-by: Jan Beulich
--- a/xen/arch/x86/trap
