flight 112634 linux-3.18 real [real]
http://logs.test-lab.xenproject.org/osstest/logs/112634/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-arm64-pvops 3 capture-logs broken REGR. vs. 112102
When I cleaned up the Xen SYSCALL entries, I inadvertently changed
the reported segment registers. Before my patch, regs->ss was
__USER(32)_DS and regs->cs was __USER(32)_CS. After the patch, they
are FLAT_USER_CS/DS(32).
This had a couple unfortunate effects. It confused the
opportunistic fast
This run is configured for baseline tests only.
flight 71975 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/71975/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf 4ad5f597153c7cb20a968236c2c7d6ff01994350
baseline v
Hi,
>From xl.cfg(5):
maxmem=MBYTES
Specifies the maximum amount of memory a guest can ever see. The
value of maxmem= must be equal or greater than memory=.
In combination with memory= it will start the guest "pre-ballooned",
if the values of memory= and maxmem= differ.
flight 112632 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/112632/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-armhf-pvops 4 host-install(4)broken REGR. vs. 112544
build-armhf-pvops
flight 112636 ovmf real [real]
http://logs.test-lab.xenproject.org/osstest/logs/112636/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf 4ad5f597153c7cb20a968236c2c7d6ff01994350
baseline version:
ovmf 0024172d909ec73a9ce9f
Add a "umip" test for the User-Model Instruction Prevention. The test
simply tries to run sgdt/sidt/sldt/str/smsw in guest user-mode with
CR4_UMIP = 1.
Signed-off-by: Boqun Feng (Intel)
---
v1 --> v2:
* add a new write_cr4_safe()
* use %pe for exception print
* refactor th
Hi Anthony:
On 2017年08月12日 02:04, Anthony PERARD wrote:
> On Wed, Aug 09, 2017 at 04:51:21PM -0400, Lan Tianyu wrote:
>> From: Chao Gao
>>
>> If a vIOMMU is exposed to guest, guest will configure the msi to remapping
>> format. The original code isn't suitable to the new format. A new pair
>> bin
On Mon, Aug 14, 2017 at 05:45:02PM +0100, Anthony PERARD wrote:
> On Mon, Aug 14, 2017 at 06:53:14PM +0300, Michael S. Tsirkin wrote:
> > On Mon, Aug 14, 2017 at 03:55:50PM +0100, Anthony PERARD wrote:
> > > On Fri, Aug 11, 2017 at 08:18:28PM +0300, Michael S. Tsirkin wrote:
> > > > On Fri, Aug 11,
On 07/31/2017 06:57 PM, Stefano Stabellini wrote:
Implement recvmsg by copying data from the "in" ring. If not enough data
is available and the recvmsg call is blocking, then wait on the
inflight_conn_req waitqueue. Take the active socket in_mutex so that
only one function can access the ring a
On 07/31/2017 06:57 PM, Stefano Stabellini wrote:
Send data to an active socket by copying data to the "out" ring. Take
the active socket out_mutex so that only one function can access the
ring at any given time.
If not enough room is available on the ring, rather than returning
immediately or
+
+ret = bedata->rsp[req_id].ret;
You can just return bedata->rsp[req_id].ret;
Or maybe not. The slot may get reused by the time you get to the end.
-boris
-boris
+/* read ret, then set this rsp slot to be reused */
+smp_mb();
+WRITE_ONCE(bedata->rsp[req_id].req_id, PVC
On 07/31/2017 06:57 PM, Stefano Stabellini wrote:
Introduce a waitqueue to allow only one outstanding accept command at
any given time and to implement polling on the passive socket. Introduce
a flags field to keep track of in-flight accept and poll commands.
Send PVCALLS_ACCEPT to the backend
flight 112629 linux-next real [real]
http://logs.test-lab.xenproject.org/osstest/logs/112629/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-xl-qemuu-debianhvm-amd64 7 xen-boot fail REGR. vs. 112551
test-amd64-i386-qemu
Thank you for the patch. Usually the description that you sent in the
previous email is written here.
I like the build.sh changes and I think introducing init/glide.yaml is a
great idea. But I don't think that introducing init/glide.lock is
necessary, is it? We could let glide generate it on the f
flight 112631 qemu-mainline real [real]
http://logs.test-lab.xenproject.org/osstest/logs/112631/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-armhf-armhf-libvirt-raw 5 host-ping-check-native fail REGR. vs. 112610
Regressions which
Sorry for the late reply, I am usually much faster replying to emails,
I have been caught in a personal issue.
On Tue, 8 Aug 2017, Rajiv Ranganath wrote:
> Hi Stefano,
>
> On Wed, Aug 2, 2017 at 12:15 AM, Stefano Stabellini
> wrote:
>
> [...]
>
> > The main thing that will be different is the
flight 112626 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/112626/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-examine 7 reboot fail REGR. vs. 110515
test-amd64-amd64-i3
Hi Julien,
On 08/14/2017 07:37 PM, Julien Grall wrote:
> Hi Sergej,
>
> On 09/08/17 09:20, Sergej Proskurin wrote:
>> +/*
>> + * According to to ARM DDI 0487B.a J1-5927, we return an error if
>> the found
>
> Please drop one of the 'to'. The rest looks good to me.
>
Great, thanks. I wi
On Fri, 4 Aug 2017 15:35:06 -0400
Boris Ostrovsky wrote:
> On 08/04/2017 07:36 AM, Juergen Gross wrote:
> > There are some Xen specific trace functions defined in
> > include/trace/events/xen.h. Remove them.
> >
> > Signed-off-by: Juergen Gross
>
> (Again, adding Ingo and Steven)
Feel free t
On Fri, 4 Aug 2017 15:20:30 -0400
Boris Ostrovsky wrote:
> On 08/04/2017 07:36 AM, Juergen Gross wrote:
> > The function xen_set_domain_pte() is used nowhere in the kernel.
> > Remove it.
> >
> > Signed-off-by: Juergen Gross
>
> Reviewed-by: Boris Ostrovsky
>
> (+ Ingo and Steven who are ma
This run is configured for baseline tests only.
flight 71974 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/71974/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf 0024172d909ec73a9ce9ffdfc9fdd4382080e110
baseline v
flight 112627 linux-4.9 real [real]
http://logs.test-lab.xenproject.org/osstest/logs/112627/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-armhf-xsm 6 xen-buildfail REGR. vs. 112513
Tests which did not s
Hi,
On 14/08/17 00:20, osstest service owner wrote:
flight 112618 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/112618/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-armhf-pvops 6 kernel-buil
flight 112628 ovmf real [real]
http://logs.test-lab.xenproject.org/osstest/logs/112628/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf 0024172d909ec73a9ce9ffdfc9fdd4382080e110
baseline version:
ovmf 79de8c79cdef26e557805
Hi Sergej,
On 09/08/17 09:20, Sergej Proskurin wrote:
+/*
+ * According to to ARM DDI 0487B.a J1-5927, we return an error if the found
Please drop one of the 'to'. The rest looks good to me.
+ * PTE is invalid or holds a reserved entry (PTE<1:0> == x0)) or if the PTE
+ * maps
Hi Sergej,
On 09/08/17 09:20, Sergej Proskurin wrote:
This commit renames the function vgic_access_guest_memory to
access_guest_memory_by_ipa. As the function name suggests, the functions
expects an IPA as argument. All invocations of this function have been
adapted accordingly. Apart from that,
Hi Wei,
On 14/08/17 16:46, Wei Liu wrote:
The function is the same on both x86 and arm. Lift it to sched.h to
save a function call, make it take a pointer to vcpu to avoid
resolving current every time it gets called.
Take the chance to change its callers to only use one current in code.
Signed
Hi Volodymyr,
On 14/08/17 18:15, Volodymyr Babchuk wrote:
On ARMv8 architecture we need to ensure that conditional check was passed
for a trapped SMC instruction that originates from AArch32 state
(ARM DDI 0487B.a page D7-2271).
Thus, we should not skip it while checking HSR.EC value.
For this
Hi Volodymyr,
On 14/08/17 18:15, Volodymyr Babchuk wrote:
On ARMv8, one of conditional exceptions (SMC that originates
from AArch32 state) has extra field in HSR.ISS encoding:
CCKNOWNPASS, bit [19]
Indicates whether the instruction might have failed its condition
code check.
0 - The instruct
On ARMv8 architecture we need to ensure that conditional check was passed
for a trapped SMC instruction that originates from AArch32 state
(ARM DDI 0487B.a page D7-2271).
Thus, we should not skip it while checking HSR.EC value.
For this type of exception special coding of HSR.ISS is used. There is
flight 112635 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/112635/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-arm64-arm64-xl-xsm 1 build-check(1) blocked n/a
build-arm64-pvops 2 hos
On ARMv8, one of conditional exceptions (SMC that originates
from AArch32 state) has extra field in HSR.ISS encoding:
CCKNOWNPASS, bit [19]
Indicates whether the instruction might have failed its condition
code check.
0 - The instruction was unconditional, or was conditional and
passed its
According to ARM architecture reference manual (ARM DDI 0487B.a page D7-2259,
ARM DDI 0406C.c page B3-1426), exception with unknown reason (HSR.EC == 0)
has no valid bits in HSR (apart from HSR.EC), so we can't check if that was
caused by conditional instruction. We need to assume that it is uncond
Hello all,
This is third version of series.
* Dropped patch that renames hsr.iss to hsr.res0
* Updated references to ARMv8 ARM (latest revision is used)
* Added better explanation about ARMv7 and ARMv8 compatibility
* No code changes. Only comments and commit messages.
Volodymyr Babchuk (3):
At 18:21 +0200 on 14 Aug (1502734919), Dario Faggioli wrote:
> On Mon, 2017-08-14 at 14:54 +0100, Tim Deegan wrote:
> > At 15:24 +0200 on 14 Aug (1502724279), Dario Faggioli wrote:
> > > About the former... I'm not sure which check of rcp->cur you're
> > > referring to. I think it's the one in rcu_
On Mon, Aug 14, 2017 at 06:53:14PM +0300, Michael S. Tsirkin wrote:
> On Mon, Aug 14, 2017 at 03:55:50PM +0100, Anthony PERARD wrote:
> > On Fri, Aug 11, 2017 at 08:18:28PM +0300, Michael S. Tsirkin wrote:
> > > On Fri, Aug 11, 2017 at 04:11:37PM +0100, Anthony PERARD wrote:
> > > > To do PCI passt
On Mon, 2017-08-14 at 14:54 +0100, Tim Deegan wrote:
> At 15:24 +0200 on 14 Aug (1502724279), Dario Faggioli wrote:
> > About the former... I'm not sure which check of rcp->cur you're
> > referring to. I think it's the one in rcu_check_quiescent_state(),
> > but
> > then, I'm not sure where to actu
On Tue, Aug 8, 2017 at 2:27 AM, Alexandru Isaila
wrote:
>
> In some introspection usecases, an in-guest agent needs to communicate
> with the external introspection agent. An existing mechanism is
> HVMOP_guest_request_vm_event, but this is restricted to kernel usecases
> like all other hypercall
On Mon, Aug 14, 2017 at 03:55:50PM +0100, Anthony PERARD wrote:
> On Fri, Aug 11, 2017 at 08:18:28PM +0300, Michael S. Tsirkin wrote:
> > On Fri, Aug 11, 2017 at 04:11:37PM +0100, Anthony PERARD wrote:
> > > To do PCI passthrough with Xen, the property acpi-pcihp-bsel needs to be
> > > set, but thi
The function is the same on both x86 and arm. Lift it to sched.h to
save a function call, make it take a pointer to vcpu to avoid
resolving current every time it gets called.
Take the chance to change its callers to only use one current in code.
Signed-off-by: Wei Liu
---
Cc: Jan Beulich
Cc: An
flight 112633 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/112633/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-arm64-arm64-xl-xsm 1 build-check(1) blocked n/a
build-arm64-pvops 2 hos
On 08/14/2017 10:42 AM, Julien Grall wrote:
>
>
> On 14/08/17 15:39, Boris Ostrovsky wrote:
>>
+#define spin_lock_kick(l) \
+({ \to understand why
you need a stronger one here
+smp_mb();
On 08/14/2017 03:08 AM, Juergen Gross wrote:
Add a sysctl hypercall to support setting parameters similar to
command line parameters, but at runtime. The parameters to set are
specified as a string, just like the boot parameters.
Acked-by: Daniel De Graaf
_
On 08/14/2017 03:08 AM, Juergen Gross wrote:
Modify the custom parameter parsing routines in:
xen/xsm/flask/flask_op.c
to indicate whether the parameter value was parsed successfully.
Acked-by: Daniel De Graaf
___
Xen-devel mailing list
Xen-devel@
On Fri, Aug 11, 2017 at 08:18:28PM +0300, Michael S. Tsirkin wrote:
> On Fri, Aug 11, 2017 at 04:11:37PM +0100, Anthony PERARD wrote:
> > To do PCI passthrough with Xen, the property acpi-pcihp-bsel needs to be
> > set, but this was done only when ACPI tables are built which is not
> > needed for a
On 14/08/17 15:39, Boris Ostrovsky wrote:
+#define spin_lock_kick(l) \
+({ \to understand why
you need a stronger one here
+smp_mb(); \
arch_lock_signal() has already a barrier for ARM.
>>
>> +#define spin_lock_kick(l) \
>> +({ \to understand why
>> you need a stronger one here
>> +smp_mb(); \
>
> arch_lock_signal() has already a barrier for ARM. So we have a double
> barrier
>>> On 14.08.17 at 16:23, wrote:
> On 14/08/17 15:18, Jan Beulich wrote:
>> IOW the note needs to be present for a restriction to
>> be enforced, which in turn means the hypervisor first needs to
>> honor the note.
>
> I don't think so. How would you get the note into already existing
> kernels h
On 14/08/17 15:40, Jan Beulich wrote:
On 14.08.17 at 09:08, wrote:
>> @@ -37,13 +37,24 @@ static void __init parse_mmcfg(char *s)
>> if ( ss )
>> *ss = '\0';
>>
>> -if ( !parse_bool(s) )
>> +switch ( parse_bool(s) ) {
>> +case 0:
>>
On 14/08/17 15:39, Jan Beulich wrote:
On 14.08.17 at 09:08, wrote:
>> --- a/xen/arch/x86/shutdown.c
>> +++ b/xen/arch/x86/shutdown.c
>> @@ -51,7 +51,7 @@ static int reboot_mode;
>> * efiUse the EFI reboot (if running under EFI)
>> */
>> static enum reboot_type reboot_type = BOOT_INVA
So that MMCFG regions not present in the MCFG ACPI table can be added
at run time by the hardware domain.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
Changes since v4:
- Change the hardware_domain check in hvm_physdev_op to a vpci check.
- Only register the MMCFG
This is needed for MSI-X, since MSI-X will need to be initialized
before parsing the BARs, so that the header BAR handlers are aware of
the MSI-X related holes and make sure they are not mapped in order for
the trap handlers to work properly.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc
This functionality is going to reside in vpci.c (and the corresponding
vpci.h header), and should be arch-agnostic. The handlers introduced
in this patch setup the basic functionality required in order to trap
accesses to the PCI config space, and allow decoding the address and
finding the correspo
Introduce a set of handlers that trap accesses to the PCI BARs and the command
register, in order to snoop BAR sizing and BAR relocation.
The command handler is used to detect changes to bit 2 (response to
memory space accesses), and maps/unmaps the BARs of the device into
the guest p2m. A rangese
On 08/14/2017 06:37 AM, Jan Beulich wrote:
On 08.08.17 at 23:45, wrote:
>> .. so that it's easy to find pages that need to be scrubbed (those pages are
>> now marked with _PGC_need_scrub bit).
>>
>> We keep track of the first unscrubbed page in a page buddy using first_dirty
>> field. For now
So that it can be called from outside in order to get the size of regular PCI
BARs. This will be required in order to map the BARs from PCI devices into PVH
Dom0 p2m.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
---
Changes since v4:
- Restore printing whether the BAR is from a vf.
- Mak
Hello,
The following series contain an implementation of handlers for the PCI
configuration space inside of Xen. This allows Xen to detect accesses
to the PCI configuration space and react accordingly.
Why is this needed? IMHO, there are two main points of doing all this
emulation inside of Xen,
Add handlers for accesses to the MSI-X message control field on the
PCI configuration space, and traps for accesses to the memory region
that contains the MSI-X table and PBA. This traps detect attempts from
the guest to configure MSI-X interrupts and properly sets them up.
Note that accesses to t
Add handlers for the MSI control, address, data and mask fields in
order to detect accesses to them and setup the interrupts as requested
by the guest.
Note that the pending register is not trapped, and the guest can
freely read/write to it.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
---
Changes since v4:
- New in this version.
---
xen/drivers/passthrough/pci.c | 24 +---
xen/include/xen/pci.h | 2 +-
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/xen/drivers/passthrough/pci.c
And use it in the ioreq code to decode accesses to the PCI IO ports
into bus, slot, function and register values.
Signed-off-by: Roger Pau Monné
---
Cc: Paul Durrant
Cc: Jan Beulich
Cc: Andrew Cooper
---
Changes since v4:
- New in this version.
---
xen/arch/x86/hvm/io.c| 19 +
And also allow it to do non-identity mappings by adding a new
parameter.
This function will be needed in order to map the BARs from PCI devices
into the Dom0 p2m (and is also used by the x86 Dom0 builder). While
there fix the function to use gfn_t and mfn_t instead of unsigned long
for memory addr
Introduce a set of handlers for the accesses to the MMCFG areas. Those
areas are setup based on the contents of the hardware MMCFG tables,
and the list of handled MMCFG areas is stored inside of the hvm_domain
struct.
The read/writes are forwarded to the generic vpci handlers once the
address is d
Hi Juergen,
On 14/08/17 08:08, Juergen Gross wrote:
Modify the custom parameter parsing routines in:
xen/arch/arm/traps.c
to indicate whether the parameter value was parsed successfully.
Cc: Stefano Stabellini
Cc: Julien Grall
Signed-off-by: Juergen Gross
Acked-by: Wei Liu
Acked-by: Jul
Hi Juergen,
On 14/08/17 08:07, Juergen Gross wrote:
Modify the custom parameter parsing routines in:
xen/arch/arm/domain_build.c
to indicate whether the parameter value was parsed successfully.
Cc: Stefano Stabellini
Cc: Julien Grall
Signed-off-by: Juergen Gross
Acked-by: Wei Liu
Acked-
Hi Juergen,
On 14/08/17 08:07, Juergen Gross wrote:
Modify the custom parameter parsing routines in:
xen/arch/arm/acpi/boot.c
to indicate whether the parameter value was parsed successfully.
Cc: Stefano Stabellini
Cc: Julien Grall
Signed-off-by: Juergen Gross
Acked-by: Wei Liu
Acked-by:
On 14/08/17 15:37, Jan Beulich wrote:
On 14.08.17 at 09:08, wrote:
>> bool __read_mostly acpi_disabled;
>> bool __initdata acpi_force;
>> static char __initdata acpi_param[10] = "";
>> -static void __init parse_acpi_param(char *s)
>> +static int __init parse_acpi_param(char *s)
>
> Again
On 14/08/17 15:35, Jan Beulich wrote:
On 14.08.17 at 09:08, wrote:
>> --- a/xen/arch/x86/psr.c
>> +++ b/xen/arch/x86/psr.c
>> @@ -420,7 +420,7 @@ static const struct feat_props l2_cat_props = {
>> };
>>
>> static void __init parse_psr_bool(char *s, char *value, char *feature,
>> -
This will help to consolidate the page-table code and avoid different
path depending on the action to perform.
Signed-off-by: Julien Grall
---
Cc: Konrad Rzeszutek Wilk
Cc: Ross Lagerwall
arch_livepatch_secure is now the same as on x86. It might be
possible to combine both, but I lef
The parameter 'ai' is used either for attribute index or for
permissions. Follow-up patch will rework that parameters to carry more
information. So rename the parameter to 'flags'.
Signed-off-by: Julien Grall
---
xen/arch/arm/mm.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
di
Currently, all the new mappings will be read-write non-executable. Allow the
caller to use other permissions.
Signed-off-by: Julien Grall
---
xen/arch/arm/mm.c | 8
1 file changed, 8 insertions(+)
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index cd7bcf7aca..fe0646002e 100644
--
Walk the hypervisor page table for data/prefetch abort fault to help
diagnostics error in the page tables.
Signed-off-by: Julien Grall
---
xen/arch/arm/traps.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 819bdbc69e..d
The description of AP[1] in Xen is based on testing rather than the ARM
ARM.
Per the ARM ARM, on EL2 stage-1 page table, AP[1] is RES1 as the
translation regime applies to only one exception level (see D4.4.4 and
G4.6.1 in ARM DDI 0487B.a).
Update the comment and also rename the field to match th
We should consider the early boot period to end when we stop using the
boot allocator. This is inline with x86 and will be helpful to know
whether we should allocate memory from the boot allocator or xenheap.
Signed-off-by: Julien Grall
---
xen/arch/arm/setup.c | 8 ++--
1 file changed, 6 in
Currently, it is not possible to specify the permission of a new
mapping. It would be necessary to use the function modify_xen_mappings
with a different set of flags.
Add introduce a couple of new flags for the permissions (Non-eXecutable,
Read-Only) and also provides define that combine the memor
Currently MAIRVAL is defined in term of MAIR0VAL and MAIR1VAL which are
both hardcoded value. This makes quite difficult to understand the value
written in both registers.
Rework the definition by using value of each attribute shifted by their
associated index.
Signed-off-by: Julien Grall
---
x
Currently, the flags used to update page tables (i.e PAGE_HYPERVISOR_*)
only contains the memory attribute index. Follow-up patches will add
more information in it.
At the same time introduce PAGE_AI_MASK to get the memory attribute
index easily.
Signed-off-by: Julien Grall
---
xen/arch/arm/mm.
They were imported from non-LPAE Linux, but Xen is LPAE only. It is time
to do some clean-up in the memory attribute and keep only what make
sense for Xen. Follow-up patch will do more clean-up.
Also, update the comment saying our attribute matches Linux.
Signed-off-by: Julien Grall
---
xen/inc
This will avoid confusion in the code when using them.
Signed-off-by: Julien Grall
---
xen/arch/arm/kernel.c | 2 +-
xen/arch/arm/mm.c | 28 +--
xen/arch/arm/platforms/vexpress.c | 2 +-
xen/drivers/video/arm_hdlcd.c | 2 +-
xen/include/
virt_to_mfn may by overridden by the source files, for improving locally
typesafe.
Therefore map_domain_page has to use __virt_to_mfn to prevent any
compilation issue in sources files that override the helper.
Signed-off-by: Julien Grall
---
Cc: Stefano Stabellini
Cc: Andrew Cooper
Cc: George
This is based on the Linux ARMv8 naming scheme (see arch/arm64/mm/proc.S). Each
type will contain "NORMAL" or "DEVICE" to make clear whether each attribute
targets device or normal memory.
Signed-off-by: Julien Grall
---
xen/arch/arm/kernel.c | 2 +-
xen/arch/arm/mm.c
Helpers to convert {G,M}FN to {G,M}ADDR and vice-versa were recently
introduced on ARM. However, they could be used in common code to
simplify a bit the code when using typesafes.
Signed-off-by: Julien Grall
---
Cc: Stefano Stabellini
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian Jackson
Cc: J
DEV_WC is only used for PAGE_HYPERVISOR_WC and does not bring much
improvement.
Signed-off-by: Julien Grall
---
xen/include/asm-arm/page.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h
index 465300c6e5..660e1779c5 10
alloc_boot_pages will panic if it is not possible to allocate. So the
check in the caller is pointless.
Signed-off-by: Julien Grall
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/srat.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/xen/arch/x86/srat.c b/xen/arch/x86/srat.c
i
This will allow to consolidate some part of the data abort and prefetch
abort handling in a single function later on.
Signed-off-by: Julien Grall
---
xen/include/asm-arm/processor.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/xen/include/asm-arm/processor.h b/xen/include/a
FnV (FAR not Valid) bit was introduced by ARMv8 in both AArch32 and
AArch64 (See D7-2275, D7-2277, G6-4958, G6-4962 in ARM DDI 0487B.a).
Signed-off-by: Julien Grall
---
xen/include/asm-arm/processor.h | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/xen/include/asm-arm
This add a bit more safety in the memory subsystem code.
Signed-off-by: Julien Grall
---
xen/arch/arm/mm.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index b3def63ed7..349ac58ffe 100644
--- a/xen/arch/arm/mm.c
+++ b/
Aliasing FAR_EL1 to IFAR is wrong because on ARMv8 FAR_EL1[31:0] is
architecturally mapped to DFAR and FAR_EL1[63:32] to DFAR.
As FAR_EL1 is not currently used in ARM32 code, remove it.
Signed-off-by: Julien Grall
---
xen/include/asm-arm/cpregs.h | 1 -
1 file changed, 1 deletion(-)
diff --git
Hi all,
This patch series contains clean-up for the ARM Memory subsystem in
preparation of reworking the page tables handling.
A branch with the patches can be found on xenbits:
https://xenbits.xen.org/git-http/people/julieng/xen-unstable.git
branch mm-cleanup-v1
Cheers,
Cc: Andrew Cooper
Cc:
Aliasing FAR_EL2 to HIFAR makes the code confusing because on ARMv8
FAR_EL2[31:0] is architecturally mapped to HDFAR and FAR_EL2[63:32] to
FAR_EL2. See D7.2.30 in ARM DDI 0487B.a. Open-code the alias instead.
Signed-off-by: Julien Grall
---
xen/arch/arm/traps.c | 8 +++-
xen/include/
Signed-off-by: Julien Grall
---
xen/include/asm-arm/processor.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index ab5225fa6c..51645f08c0 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm
ioremap_cache is a wrapper of ioremap_attr(...).
Signed-off-by: Julien Grall
---
xen/arch/arm/platforms/exynos5.c | 2 +-
xen/arch/arm/platforms/omap5.c | 6 ++
2 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/xen/arch/arm/platforms/exynos5.c b/xen/arch/arm/platforms/exynos5.
While ARM32 has 2 distinct registers for the hypervisor fault register
(one for prefetch abort, the other for data abort), AArch64 has only
one.
Currently, the logic is open-code but a follow-up patch will require to
read it too. So move the logic in a separate helper and use it instead
of open-co
At the moment, most of the callers will have to use mfn_x. However
follow-up patches will remove some of them by propagating the typesafe a
bit further.
Signed-off-by: Julien Grall
---
Cc: Stefano Stabellini
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian Jackson
Cc: Jan Beulich
Cc: Konrad Rzes
alloc_boot_pages will panic if it is not possible to allocate. So the
check in the caller is pointless.
Signed-off-by: Julien Grall
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/numa.c | 8
1 file changed, 8 deletions(-)
diff --git a/xen/arch/x86/numa.c b/xen/arch/x86/numa.
The only way alloc_boot_pages will return 0 is during the error case.
Although, Xen will panic in the error path. So the check in the caller
is pointless.
Looking at the loop, my understanding is it will try to allocate in
smaller chunk if a bigger chunk fail. Given that alloc_boot_pages can
never
On 14/08/17 15:18, Jan Beulich wrote:
On 14.08.17 at 14:21, wrote:
>> On 14/08/17 13:40, Jan Beulich wrote:
>> On 14.08.17 at 13:05, wrote:
On 14/08/17 12:48, Jan Beulich wrote:
On 14.08.17 at 12:35, wrote:
>> On 14/08/17 12:29, Jan Beulich wrote:
>> On 14.08.1
>>> On 14.08.17 at 09:08, wrote:
> With _cmdline_parse() now issuing error messages in case of illegal
> parameters signalled by parsing functions specified in custom_param()
> the message issued by setup_ioapic_ack() can be removed.
>
> Cc: Jan Beulich
> Cc: Andrew Cooper
> Signed-off-by: Juer
>>> On 14.08.17 at 09:08, wrote:
> With _cmdline_parse() now issuing error messages in case of illegal
> parameters signalled by parsing functions specified in custom_param()
> the message issued by mce_set_verbosity() can be removed.
>
> Cc: Jan Beulich
> Cc: Andrew Cooper
> Signed-off-by: Jue
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